MC100EP35DTR2G
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 1 week ago) |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 8-TSSOP, 8-MSOP (0.118, 3.00mm Width) |
| Number of Pins | 8 |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tape & Reel (TR) |
| Published | 2000 |
| Series | 100EP |
| JESD-609 Code | e3 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 8 |
| Type | JK Type |
| Terminal Finish | Tin (Sn) |
| Additional Feature | NECL MODE: VCC = 0V WITH VEE = -3V TO -5.5V |
| Subcategory | FF/Latches |
| Packing Method | TAPE AND REEL |
| Technology | ECL |
| Voltage - Supply | -3V~-5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 3.3V |
| Terminal Pitch | 0.65mm |
| Time@Peak Reflow Temperature-Max (s) | 40 |
| Base Part Number | 100EP35 |
| Function | Reset |
| Qualification Status | Not Qualified |
| Output Type | Differential |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 5.5V |
| Power Supplies | -4.5V |
| Supply Voltage-Min (Vsup) | 3V |
| Number of Bits | 2 |
| Clock Frequency | 3GHz |
| Propagation Delay | 490 ps |
| Turn On Delay Time | 410 ps |
| Logic Function | Flip-Flop, JK-Type |
| Halogen Free | Halogen Free |
| Prop. Delay@Nom-Sup | 0.575 ns |
| Trigger Type | Positive Edge |
| High Level Output Current | -50mA |
| Low Level Output Current | 50mA |
| Number of Output Lines | 1 |
| Clock Edge Trigger Type | Positive Edge |
| Max Frequency@Nom-Sup | 3000000000Hz |
| Length | 3mm |
| Width | 3mm |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
MC100EP35DTR2G Overview
The flip flop is packaged in 8-TSSOP, 8-MSOP (0.118, 3.00mm Width). There is an embedded version in the package Tape & Reel (TR). Currently, the output is configured to use Differential. This trigger is configured to use Positive Edge. Surface Mountis in the way of this electric part. The JK flip flop operates at a voltage of -3V~-5.5V. Temperature is set to -40°C~85°C TA. It is an electronic flip flop with the type JK Type. It belongs to the 100EPseries of FPGAs. This D flip flop should not have a frequency greater than 3GHz. Terminations are 8. You can search similar parts based on 100EP35. A voltage of 3.3V is used to power it. Electronic part Surface Mountis mounted in the way. Basically, it is designed with a set of 8 pins. This device exhibits a clock edge trigger type of Positive Edge. The part is included in FF/Latches. There are 2bits in its design. It reaches the maximum supply voltage (Vsup) at 5.5V. Normally, the supply voltage (Vsup) should be above 3V. Due to its reliability, this T flip flop is well suited for TAPE AND REEL. The D latch operates on -4.5V volts. It has 1 output lines to operate. Additionally, it is characterized by NECL MODE: VCC = 0V WITH VEE = -3V TO -5.5V. -50mAis the output current at high level. There is 50mA output current at the low level.
MC100EP35DTR2G Features
Tape & Reel (TR) package
100EP series
8 pins
2 Bits
-4.5V power supplies
MC100EP35DTR2G Applications
There are a lot of ON Semiconductor MC100EP35DTR2G Flip Flops applications.
- Data Synchronizers
- Matched Rise and Fall
- Counters
- Storage Registers
- Bounce elimination switch
- Latch
- Convert a momentary switch to a toggle switch
- Bus hold
- Power down protection
- Latch-up performance
