MC100LVEL31DR2
| Parameters | |
|---|---|
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 8-SOIC (0.154, 3.90mm Width) |
| Number of Pins | 8 |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tape & Reel (TR) |
| Published | 2008 |
| Series | 100LVEL |
| JESD-609 Code | e0 |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 8 |
| Type | D-Type |
| Terminal Finish | Tin/Lead (Sn/Pb) |
| Subcategory | FF/Latches |
| Packing Method | TAPE AND REEL |
| Technology | ECL |
| Voltage - Supply | -3V~-3.8V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 240 |
| Supply Voltage | 3.3V |
| Reach Compliance Code | not_compliant |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | 100LVEL31 |
| Function | Set(Preset) and Reset |
| Qualification Status | Not Qualified |
| Output Type | Differential |
| Polarity | Non-Inverting |
| Power Supplies | -4.5V |
| Supply Voltage-Min (Vsup) | 3V |
| Number of Circuits | 1 |
| Number of Bits | 1 |
| Clock Frequency | 2.9GHz |
| Propagation Delay | 590 ps |
| Turn On Delay Time | 475 ps |
| Logic Function | AND, D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 35mA |
| Output Characteristics | OPEN-EMITTER |
| Trigger Type | Positive Edge |
| fmax-Min | 2900 MHz |
| Clock Edge Trigger Type | Positive Edge |
| Max Frequency@Nom-Sup | 2900000000Hz |
| Length | 4.9mm |
| Width | 3.9mm |
| RoHS Status | Non-RoHS Compliant |
| Lead Free | Contains Lead |
MC100LVEL31DR2 Overview
The package is in the form of 8-SOIC (0.154, 3.90mm Width). There is an embedded version in the package Tape & Reel (TR). In the configuration, Differentialis used as the output. There is a trigger configured with Positive Edge. Surface Mountis positioned in the way of this electronic part. It operates with a supply voltage of -3V~-3.8V. A temperature of -40°C~85°C TAis used in the operation. Logic flip flops of this type are classified as D-Type. The FPGA belongs to the 100LVEL series. A frequency of 2.9GHzshould not be exceeded by its output. As a result, it consumes 35mA quiescent current and is not affected by external forces. Terminations are 8. Members of the 100LVEL31family make up this object. An input voltage of 3.3Vpowers the D latch. Surface Mount mounts this electronic component. This board is designed with 8pins on it. There is a clock edge trigger type of Positive Edgeon this device. There is a base part number FF/Latchesfor the RS flip flops. It is designed with 1bits. Normally, the supply voltage (Vsup) should be kept above 3V. The superior flexibility is achieved through the use of 1 circuits. A reliable performance of this D flip flop makes it well suited for use in TAPE AND REEL. The D latch operates on -4.5V volts.
MC100LVEL31DR2 Features
Tape & Reel (TR) package
100LVEL series
8 pins
1 Bits
-4.5V power supplies
MC100LVEL31DR2 Applications
There are a lot of ON Semiconductor MC100LVEL31DR2 Flip Flops applications.
- Consumer
- Data transfer
- Shift registers
- CMOS Process
- Asynchronous counter
- Shift Registers
- Frequency division
- Individual Asynchronous Resets
- Computing
- Balanced 24 mA output drivers
