MC10EP31DR2
| Parameters | |
|---|---|
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 8-SOIC (0.154, 3.90mm Width) |
| Number of Pins | 8 |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tape & Reel (TR) |
| Published | 2008 |
| Series | 10EP |
| JESD-609 Code | e0 |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 8 |
| Type | D-Type |
| Terminal Finish | Tin/Lead (Sn/Pb) |
| Additional Feature | NECL MODE: VCC = 0V WITH VEE = -3.0V TO -5.5V |
| Subcategory | FF/Latches |
| Packing Method | TAPE AND REEL |
| Technology | ECL |
| Voltage - Supply | -3V~-5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 240 |
| Supply Voltage | 3.3V |
| Reach Compliance Code | not_compliant |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | 10EP31 |
| Function | Set(Preset) and Reset |
| Qualification Status | Not Qualified |
| Output Type | Differential |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 5.5V |
| Power Supplies | -5.2V |
| Supply Voltage-Min (Vsup) | 3V |
| Number of Circuits | 1 |
| Number of Bits | 1 |
| Clock Frequency | 3GHz |
| Propagation Delay | 410 ps |
| Turn On Delay Time | 340 ps |
| Family | 10E |
| Logic Function | AND, D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 45mA |
| Output Characteristics | OPEN-EMITTER |
| Trigger Type | Positive Edge |
| High Level Output Current | 50mA |
| Low Level Output Current | 50mA |
| Power Supply Current-Max (ICC) | 47mA |
| Clock Edge Trigger Type | Positive Edge |
| Max Frequency@Nom-Sup | 3000000000Hz |
| Length | 4.9mm |
| Width | 3.9mm |
| RoHS Status | Non-RoHS Compliant |
| Lead Free | Contains Lead |
MC10EP31DR2 Overview
In the form of 8-SOIC (0.154, 3.90mm Width), it has been packaged. It is included in the package Tape & Reel (TR). In the configuration, Differentialis used as the output. It is configured with a trigger that uses a value of Positive Edge. Surface Mountis positioned in the way of this electronic part. With a supply voltage of -3V~-5.5V volts, it operates. A temperature of -40°C~85°C TAis used in the operation. This D latch has the type D-Type. The 10EPseries comprises this type of FPGA. Its output frequency should not exceed 3GHz Hz. As a result, it consumes 45mA of quiescent current without being affected by external factors. 8terminations have occurred. The object belongs to the 10EP31 family. A voltage of 3.3V provides power to the D latch. In this case, the D flip flop belongs to the 10Efamily. It is mounted in the way of Surface Mount. It is designed with 8 pins. A Positive Edgeclock edge trigger is used in this device. This device has the base part number FF/Latches. 1bits are used in its design. There is a 5.5Vmaximum supply voltage (Vsup). If you want to maintain normal operation, you should keep the supply voltage (Vsup) above 3V. The superior flexibility of this circuit is achieved by using 1 circuits. Compared to other similar T flip flops, this device offers reliable performance and is well suited for TAPE AND REEL. It operates from -5.2V power supplies. Additionally, it is characterized by NECL MODE: VCC = 0V WITH VEE = -3.0V TO -5.5V. There is 50mA output current at the high level. There is 50mA output current at the low level.
MC10EP31DR2 Features
Tape & Reel (TR) package
10EP series
8 pins
1 Bits
-5.2V power supplies
MC10EP31DR2 Applications
There are a lot of ON Semiconductor MC10EP31DR2 Flip Flops applications.
- Patented noise
- Data Synchronizers
- Latch-up performance
- Buffer registers
- Storage Registers
- Dynamic threshold performance
- Data transfer
- Latch
- Clock pulse
- Matched Rise and Fall
