Parameters |
Factory Lead Time |
1 Week |
Lifecycle Status |
LIFETIME (Last Updated: 1 month ago) |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
8-VFDFN Exposed Pad |
Number of Pins |
8 |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Tape & Reel (TR) |
Published |
2000 |
Series |
10EP |
Pbfree Code |
yes |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
8 |
Type |
D-Type |
Terminal Finish |
Nickel/Gold/Palladium (Ni/Au/Pd) |
Additional Feature |
NECL MODE: VCC = 0V WITH VEE = -3V TO -5.5V |
Subcategory |
FF/Latches |
Packing Method |
TAPE AND REEL |
Technology |
ECL |
Voltage - Supply |
-3V~-5.5V |
Terminal Position |
DUAL |
Terminal Form |
NO LEAD |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
3.3V |
Terminal Pitch |
0.5mm |
Time@Peak Reflow Temperature-Max (s) |
40 |
Base Part Number |
10EP51 |
Function |
Reset |
Qualification Status |
Not Qualified |
Output Type |
Differential |
Polarity |
Non-Inverting |
Supply Voltage-Max (Vsup) |
5.5V |
Power Supplies |
-5.2V |
Supply Voltage-Min (Vsup) |
3V |
Number of Circuits |
1 |
Number of Bits |
1 |
Clock Frequency |
3GHz |
Propagation Delay |
370 ps |
Turn On Delay Time |
320 ps |
Family |
10E |
Current - Quiescent (Iq) |
45mA |
Halogen Free |
Halogen Free |
Prop. Delay@Nom-Sup |
0.42 ns |
Trigger Type |
Positive, Negative |
High Level Output Current |
-50mA |
Low Level Output Current |
50mA |
Power Supply Current-Max (ICC) |
47mA |
Clock Edge Trigger Type |
Positive Edge |
Max Frequency@Nom-Sup |
3000000000Hz |
Length |
2mm |
Width |
2mm |
RoHS Status |
RoHS Compliant |
Lead Free |
Lead Free |
MC10EP51MNR4G Overview
The flip flop is packaged in 8-VFDFN Exposed Pad. The Tape & Reel (TR)package contains it. T flip flop uses Differentialas the output. The trigger configured with it uses Positive, Negative. Surface Mountis in the way of this electric part. The JK flip flop operates at -3V~-5.5Vvolts. A temperature of -40°C~85°C TAis considered to be the operating temperature. D-Typeis the type of this D latch. JK flip flop is a part of the 10EPseries of FPGAs. In order for it to function properly, its output frequency should not exceed 3GHz. It consumes 45mA of quiescent current without being affected by external factors. A total of 8 terminations have been made. The 10EP51 family contains this object. An input voltage of 3.3Vpowers the D latch. It is a member of the 10Efamily of D flip flop. There is an electronic part that is mounted in the way of Surface Mount. It is designed with 8 pins. In this device, the clock edge trigger type is Positive Edge. This RS flip flops is a part number FF/Latches. An electronic part with 1bits has been designed. There is a 5.5Vmaximum supply voltage (Vsup). The supply voltage (Vsup) should be maintained above 3V for normal operation. The superior flexibility of this product is achieved by using 1 circuits. As a result of its reliability, this D flip flop is ideally suited for TAPE AND REEL. It operates from -5.2V power supplies. NECL MODE: VCC = 0V WITH VEE = -3V TO -5.5Vis also one of its characteristics. A -50mAis set for the high level output current. It is set to 50mAfor the low level output current.
MC10EP51MNR4G Features
Tape & Reel (TR) package
10EP series
8 pins
1 Bits
-5.2V power supplies
MC10EP51MNR4G Applications
There are a lot of ON Semiconductor MC10EP51MNR4G Flip Flops applications.
- Differential Individual
- Clock pulse
- QML qualified product
- Patented noise
- Memory
- Divide a clock signal by 2 or 4
- Counters
- Asynchronous counter
- Single Down Count-Control Line
- Test & Measurement