Parameters |
Factory Lead Time |
1 Week |
Lifecycle Status |
ACTIVE (Last Updated: 2 hours ago) |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
14-SOIC (0.154, 3.90mm Width) |
Number of Pins |
14 |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Tube |
Published |
2006 |
Series |
74ACT |
JESD-609 Code |
e3 |
Pbfree Code |
yes |
Part Status |
Active |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
14 |
ECCN Code |
EAR99 |
Type |
D-Type |
Terminal Finish |
Tin (Sn) |
Subcategory |
FF/Latches |
Technology |
CMOS |
Voltage - Supply |
4.5V~5.5V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
5V |
Time@Peak Reflow Temperature-Max (s) |
40 |
Base Part Number |
74ACT74 |
Function |
Set(Preset) and Reset |
Output Type |
Differential |
Operating Supply Voltage |
5V |
Polarity |
Non-Inverting |
Power Supplies |
5V |
Number of Circuits |
2 |
Load Capacitance |
50pF |
Output Current |
24mA |
Clock Frequency |
210MHz |
Propagation Delay |
13 ns |
Turn On Delay Time |
5.5 ns |
Family |
ACT |
Logic Function |
AND, D-Type, Flip-Flop |
Current - Quiescent (Iq) |
4μA |
Halogen Free |
Halogen Free |
Current - Output High, Low |
24mA 24mA |
Number of Bits per Element |
1 |
Max Propagation Delay @ V, Max CL |
11ns @ 5V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
4.5pF |
Number of Output Lines |
1 |
Clock Edge Trigger Type |
Positive Edge |
Height |
1.5mm |
Length |
8.75mm |
Width |
4mm |
Radiation Hardening |
No |
REACH SVHC |
No SVHC |
RoHS Status |
ROHS3 Compliant |
Lead Free |
Lead Free |
MC74ACT74DG Overview
The flip flop is packaged in a case of 14-SOIC (0.154, 3.90mm Width). The Tubepackage contains it. T flip flop uses Differentialas its output configuration. The trigger configured with it uses Positive Edge. Surface Mountmounts this electrical part. The JK flip flop operates with an input voltage of 4.5V~5.5V volts. A temperature of -40°C~85°C TAis used in the operation. There is D-Type type of electronic flip flop associated with this device. In terms of FPGAs, it belongs to the 74ACT series. You should not exceed 210MHzin the output frequency of the device. As a result, it consumes 4μA quiescent current. There have been 14 terminations. JK flip flop belongs to 74ACT74 family. An input voltage of 5Vpowers the D latch. Input capacitance of this device is 4.5pF farads. The electronic device belongs to the ACTfamily. Electronic part Surface Mountis mounted in the way. The 14pins are designed into the board. Its clock edge trigger type is Positive Edge. It is part of the FF/Latchesbase part number family. In order to achieve its superior flexibility, 2 circuits are used. A total of 5V power supplies are needed to run it. Optimal efficiency requires a supply voltage of 5V. In addition to its maximum design flexibility, the output current of the T flip flop is 24mA. There are 1 output Lines, which generate the binary equivalent of the input line whose value is equal to “1” and are available to encode either a decimal or hexadecimal input pattern to typically a binary or “B. C. D” (binary coded decimal) output code.
MC74ACT74DG Features
Tube package
74ACT series
14 pins
5V power supplies
MC74ACT74DG Applications
There are a lot of ON Semiconductor MC74ACT74DG Flip Flops applications.
- Buffered Clock
- Reduced system switching noise
- 2 – Bit synchronous counter
- Count Modes
- Frequency Dividers
- Consumer
- Set-reset capability
- Modulo – n – counter
- Balanced Propagation Delays
- Latch-up performance