Parameters |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
20-SOIC (0.295, 7.50mm Width) |
Number of Pins |
20 |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Tape & Reel (TR) |
Published |
2009 |
Series |
74LVX |
JESD-609 Code |
e0 |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
20 |
Type |
D-Type |
Terminal Finish |
Tin/Lead (Sn/Pb) |
Subcategory |
FF/Latches |
Packing Method |
TAPE AND REEL |
Technology |
CMOS |
Voltage - Supply |
2V~3.6V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
235 |
Supply Voltage |
2.7V |
Reach Compliance Code |
not_compliant |
Time@Peak Reflow Temperature-Max (s) |
NOT SPECIFIED |
Base Part Number |
74LVX374 |
Function |
Standard |
Qualification Status |
Not Qualified |
Output Type |
Tri-State, Non-Inverted |
Number of Elements |
1 |
Polarity |
Non-Inverting |
Supply Voltage-Min (Vsup) |
2V |
Number of Circuits |
8 |
Load Capacitance |
50pF |
Number of Ports |
2 |
Number of Bits |
8 |
Clock Frequency |
95MHz |
Propagation Delay |
19.8 ns |
Turn On Delay Time |
6.7 ns |
Family |
LV/LV-A/LVX/H |
Logic Function |
D-Type, Flip-Flop |
Current - Quiescent (Iq) |
4μA |
Current - Output High, Low |
4mA 4mA |
Max I(ol) |
0.004 A |
Max Propagation Delay @ V, Max CL |
14.1ns @ 3.3V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
4pF |
Number of Output Lines |
3 |
Clock Edge Trigger Type |
Positive Edge |
Max Frequency@Nom-Sup |
55000000Hz |
Height Seated (Max) |
2.65mm |
Width |
7.5mm |
RoHS Status |
Non-RoHS Compliant |
Lead Free |
Contains Lead |
MC74LVX374DWR2 Overview
The flip flop is packaged in a case of 20-SOIC (0.295, 7.50mm Width). It is included in the package Tape & Reel (TR). It is configured with Tri-State, Non-Invertedas an output. JK flip flop uses Positive Edgeas the trigger. There is an electric part mounted in the way of Surface Mount. A 2V~3.6Vsupply voltage is required for it to operate. In this case, the operating temperature is -40°C~85°C TA. D-Typeis the type of this D latch. This type of FPGA is a part of the 74LVX series. Its output frequency should not exceed 95MHz Hz. D latch consists of 1 elements. T flip flop consumes 4μA quiescent energy. 20terminations have occurred. This D latch belongs to the family of 74LVX374. The power source is powered by 2.7V. The input capacitance of this T flip flop is 4pF farads, which is defined as the capacitance between the input terminals of an op amp with either input grounded. In terms of electronic devices, this device belongs to the LV/LV-A/LVX/Hfamily of devices. There is an electronic part mounted in the way of Surface Mount. A total of 20pins are provided on this board. Its clock edge trigger type is Positive Edge. This part is included in FF/Latches. An electronic part with 8bits has been designed. Normally, the supply voltage (Vsup) should be above 2V. The superior flexibility of this circuit is achieved by using 8 circuits. On the basis of its reliable performance, this D flip flop is well suited for use with TAPE AND REEL. This flip flop has a total of 2ports. To operate, the chip has a total of 3 output lines.
MC74LVX374DWR2 Features
Tape & Reel (TR) package
74LVX series
20 pins
8 Bits
MC74LVX374DWR2 Applications
There are a lot of ON Semiconductor MC74LVX374DWR2 Flip Flops applications.
- Clock pulse
- Parallel data storage
- Storage Registers
- Digital electronics systems
- Patented noise
- Bus hold
- Power down protection
- Supports Live Insertion
- Shift registers
- Frequency Dividers