Parameters |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
14-SOIC (0.209, 5.30mm Width) |
Number of Pins |
14 |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Tube |
Published |
2011 |
Series |
74LVX |
JESD-609 Code |
e4 |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
3 (168 Hours) |
Number of Terminations |
14 |
Type |
D-Type |
Terminal Finish |
Nickel/Palladium/Gold (Ni/Pd/Au) |
Subcategory |
FF/Latches |
Packing Method |
RAIL |
Technology |
CMOS |
Voltage - Supply |
2V~3.6V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
2.7V |
Reach Compliance Code |
unknown |
Time@Peak Reflow Temperature-Max (s) |
40 |
Base Part Number |
74LVX74 |
Function |
Set(Preset) and Reset |
Qualification Status |
Not Qualified |
Output Type |
Differential |
Polarity |
Non-Inverting |
Supply Voltage-Max (Vsup) |
3.6V |
Power Supplies |
3.3V |
Supply Voltage-Min (Vsup) |
2V |
Number of Circuits |
2 |
Load Capacitance |
50pF |
Clock Frequency |
85MHz |
Propagation Delay |
18.5 ns |
Turn On Delay Time |
5.7 ns |
Family |
LV/LV-A/LVX/H |
Logic Function |
AND, D-Type, Flip-Flop |
Current - Quiescent (Iq) |
2μA |
Current - Output High, Low |
4mA 4mA |
Max I(ol) |
0.004 A |
Number of Bits per Element |
1 |
Max Propagation Delay @ V, Max CL |
13.2ns @ 3.3V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
4pF |
Number of Output Lines |
1 |
fmax-Min |
80 MHz |
Clock Edge Trigger Type |
Positive Edge |
Max Frequency@Nom-Sup |
50000000Hz |
RoHS Status |
RoHS Compliant |
Lead Free |
Lead Free |
MC74LVX74MG Overview
The flip flop is packaged in 14-SOIC (0.209, 5.30mm Width). A package named Tubeincludes it. It is configured with Differentialas an output. It is configured with a trigger that uses Positive Edge. Surface Mountis in the way of this electric part. The JK flip flop operates with an input voltage of 2V~3.6V volts. Currently, the operating temperature is -40°C~85°C TA. A flip flop of this type is classified as a D-Type. The FPGA belongs to the 74LVX series. A frequency of 85MHzshould be the maximum output frequency. During its operation, it consumes 2μA quiescent energy. Currently, there are 14 terminations. It is a member of the 74LVX74 family. Power is provided by a 2.7V supply. JK flip flop input capacitance is 4pF farads. An electronic device belonging to the family LV/LV-A/LVX/Hcan be found here. There is an electronic part that is mounted in the way of Surface Mount. This board is designed with 14pins on it. Its clock edge trigger type is Positive Edge. This device has the base part number FF/Latches. Vsup reaches 3.6V, the maximal supply voltage. Keeping the supply voltage (Vsup) above 2V is necessary for normal operation. Its flexibility is enhanced by 2 circuits. Considering its reliability, this T flip flop is well suited for RAIL. The power supply is 3.3V. There are 1 output lines in this JK flip flop.
MC74LVX74MG Features
Tube package
74LVX series
14 pins
3.3V power supplies
MC74LVX74MG Applications
There are a lot of ON Semiconductor MC74LVX74MG Flip Flops applications.
- Synchronous counter
- CMOS Process
- Buffer registers
- Communications
- Bus hold
- Set-reset capability
- EMI reduction circuitry
- Automotive
- Digital electronics systems
- Memory