N74F5074N,602
| Parameters | |
|---|---|
| Mounting Type | Through Hole |
| Package / Case | 14-DIP (0.300, 7.62mm) |
| Surface Mount | NO |
| Operating Temperature | 0°C~70°C TA |
| Packaging | Tube |
| Published | 1999 |
| Series | 74F |
| JESD-609 Code | e4 |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 14 |
| Type | D-Type |
| Terminal Finish | NICKEL PALLADIUM GOLD |
| Technology | TTL |
| Voltage - Supply | 4.5V~5.5V |
| Terminal Position | DUAL |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 5V |
| Reach Compliance Code | unknown |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | 74F5074 |
| Function | Set(Preset) and Reset |
| Qualification Status | Not Qualified |
| Output Type | Differential |
| Number of Elements | 2 |
| Supply Voltage-Max (Vsup) | 5.5V |
| Supply Voltage-Min (Vsup) | 4.5V |
| Load Capacitance | 50pF |
| Clock Frequency | 120MHz |
| Family | F/FAST |
| Current - Quiescent (Iq) | 30mA |
| Current - Output High, Low | 15mA 20mA |
| Output Polarity | COMPLEMENTARY |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 6ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Propagation Delay (tpd) | 6.5 ns |
| Power Supply Current-Max (ICC) | 30mA |
| fmax-Min | 90 MHz |
| RoHS Status | ROHS3 Compliant |
N74F5074N,602 Overview
It is packaged in the way of 14-DIP (0.300, 7.62mm). Package Tubeembeds it. It is configured with Differentialas an output. It is configured with the trigger Positive Edge. There is an electric part mounted in the way of Through Hole. The JK flip flop operates with an input voltage of 4.5V~5.5V volts. It is operating at a temperature of 0°C~70°C TA. D-Typedescribes this flip flop. In terms of FPGAs, it belongs to the 74F series. It should not exceed 120MHzin terms of its output frequency. D latch consists of 2 elements. This process consumes 30mA quiescents. 14terminations have occurred. The 74F5074 family contains it. Power is provided by a 5V supply. Devices in the F/FASTfamily are electronic devices. The maximal supply voltage (Vsup) reaches 5.5V. For normal operation, the supply voltage (Vsup) should be kept above 4.5V.
N74F5074N,602 Features
Tube package
74F series
N74F5074N,602 Applications
There are a lot of NXP USA Inc. N74F5074N,602 Flip Flops applications.
- Matched Rise and Fall
- Differential Individual
- Bounce elimination switch
- Bus hold
- Storage Registers
- Patented noise
- Digital electronics systems
- Balanced 24 mA output drivers
- Communications
- Asynchronous counter
