SN74ACT374NSR
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 6 days ago) |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 20-SOIC (0.209, 5.30mm Width) |
| Number of Pins | 20 |
| Weight | 266.712314mg |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74ACT |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 20 |
| ECCN Code | EAR99 |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory | FF/Latches |
| Packing Method | TR |
| Technology | CMOS |
| Voltage - Supply | 4.5V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 5V |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | 74ACT374 |
| Function | Standard |
| Qualification Status | Not Qualified |
| Output Type | Tri-State, Non-Inverted |
| Operating Supply Voltage | 5V |
| Number of Elements | 1 |
| Polarity | Non-Inverting |
| Power Supplies | 5V |
| Number of Circuits | 8 |
| Load Capacitance | 50pF |
| Number of Ports | 2 |
| Output Current | 24mA |
| Number of Bits | 8 |
| Clock Frequency | 160MHz |
| Propagation Delay | 10 ns |
| Quiescent Current | 4μA |
| Turn On Delay Time | 8.5 ns |
| Family | ACT |
| Logic Function | D-Type, Flip-Flop |
| Current - Output High, Low | 24mA 24mA |
| Max I(ol) | 0.024 A |
| Max Propagation Delay @ V, Max CL | 10ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 4.5pF |
| Power Supply Current-Max (ICC) | 0.04mA |
| Number of Input Lines | 3 |
| Count Direction | UNIDIRECTIONAL |
| Clock Edge Trigger Type | Positive Edge |
| Max Frequency@Nom-Sup | 90000000Hz |
| Height | 2mm |
| Length | 12.6mm |
| Width | 5.3mm |
| Thickness | 1.95mm |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
SN74ACT374NSR Overview
20-SOIC (0.209, 5.30mm Width)is the packaging method. As part of the package Tape & Reel (TR), it is embedded. T flip flop uses Tri-State, Non-Invertedas its output configuration. It is configured with the trigger Positive Edge. The electronic part is mounted in the way of Surface Mount. The JK flip flop operates at 4.5V~5.5Vvolts. In this case, the operating temperature is -40°C~85°C TA. There is D-Type type of electronic flip flop associated with this device. JK flip flop is a part of the 74ACTseries of FPGAs. You should not exceed 160MHzin its output frequency. In total, it contains 1 elements. There are 20 terminations,The object belongs to the 74ACT374 family. A voltage of 5V provides power to the D latch. A 4.5pFfarad input capacitance is provided by this T flip flop. It is a member of the ACTfamily of D flip flop. There is an electronic part mounted in the way of Surface Mount. The 20pins are designed into the board. Its clock edge trigger type is Positive Edge. The part you are looking for is included in FF/Latches. The design is based on 8bits. Using 8 circuits, it is highly flexible. As a result of its reliability, this D flip flop is ideally suited for TR. An electrical current of 5V volts is applied to it. There are 2 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line. If high efficiency is to be achieved, the supply voltage should be maintained at 5V. This T flip flop features a maximum design flexibility due to its output current of 24mA. There are 3 input Lines, which consist of an electronic circuit connected between the ac mains and the rectifier input stage of the switching power supply. This D latch consumes 4μA quiescent current at all.
SN74ACT374NSR Features
Tape & Reel (TR) package
74ACT series
20 pins
8 Bits
5V power supplies
SN74ACT374NSR Applications
There are a lot of Texas Instruments SN74ACT374NSR Flip Flops applications.
- Functionally equivalent to the MC10/100EL29
- Latch-up performance
- Frequency Dividers
- Shift Registers
- Clock pulse
- Cold spare funcion
- Guaranteed simultaneous switching noise level
- High Performance Logic for test systems
- Count Modes
- Data storage
