SN74ACT74DBR
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 2 days ago) |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 14-SSOP (0.209, 5.30mm Width) |
| Number of Pins | 14 |
| Weight | 121.789551mg |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Cut Tape (CT) |
| Series | 74ACT |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 14 |
| ECCN Code | EAR99 |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory | FF/Latches |
| Packing Method | TR |
| Technology | CMOS |
| Voltage - Supply | 4.5V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 5V |
| Terminal Pitch | 0.65mm |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | 74ACT74 |
| Function | Set(Preset) and Reset |
| Qualification Status | Not Qualified |
| Output Type | Differential |
| Operating Supply Voltage | 5V |
| Polarity | Non-Inverting |
| Power Supplies | 5V |
| Number of Circuits | 2 |
| Load Capacitance | 50pF |
| Output Current | 24mA |
| Clock Frequency | 210MHz |
| Propagation Delay | 11 ns |
| Turn On Delay Time | 5.5 ns |
| Family | ACT |
| Logic Function | AND, D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 2μA |
| Current - Output High, Low | 24mA 24mA |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 11ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 3pF |
| Number of Input Lines | 4 |
| Clock Edge Trigger Type | Positive Edge |
| Height | 2mm |
| Length | 6.2mm |
| Width | 5.3mm |
| Thickness | 1.95mm |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
SN74ACT74DBR Overview
As a result, it is packaged as 14-SSOP (0.209, 5.30mm Width). It is included in the package Cut Tape (CT). There is a Differentialoutput configured with it. This trigger uses the value Positive Edge. Surface Mountis in the way of this electric part. A voltage of 4.5V~5.5Vis used as the supply voltage. -40°C~85°C TAis the operating temperature. D-Typeis the type of this D latch. JK flip flop is a part of the 74ACTseries of FPGAs. Its output frequency should not exceed 210MHz Hz. As a result, it consumes 2μA quiescent current. Terminations are 14. JK flip flop belongs to 74ACT74 family. A voltage of 5V provides power to the D latch. The input capacitance of this T flip flop is 3pF farads, which is defined as the capacitance between the input terminals of an op amp with either input grounded. Devices in the ACTfamily are electronic devices. It is mounted in the way of Surface Mount. There are 14pins on it. The clock edge trigger type for this device is Positive Edge. It is included in FF/Latches. The superior flexibility is achieved through the use of 2 circuits. Compared to other similar T flip flops, this device offers reliable performance and is well suited for TR. The power supply is 5V. For high efficiency, the supply voltage should be kept at 5V. As a result of its output current of 24mA, it is very flexible in terms of design. This input has 4lines.
SN74ACT74DBR Features
Cut Tape (CT) package
74ACT series
14 pins
5V power supplies
SN74ACT74DBR Applications
There are a lot of Texas Instruments SN74ACT74DBR Flip Flops applications.
- Guaranteed simultaneous switching noise level
- ESD protection
- Shift registers
- ESD performance
- Single Up Count-Control Line
- Bounce elimination switch
- ESCC
- Event Detectors
- Cold spare funcion
- Data transfer
