SN74ALVCH16821DGGR

1.65V~3.6V 150MHz 20 Bit D-Type Flip Flop DUAL 74ALVCH16821 56 Pins 40μA 74ALVCH Series 56-TFSOP (0.240, 6.10mm Width)

Manufacturer: Texas Instruments
Nocochips NO: 815-SN74ALVCH16821DGGR
Package: 56-TFSOP (0.240, 6.10mm Width)
Datasheet: -
Stock: 846
Description: 1.65V~3.6V 150MHz 20 Bit D-Type Flip Flop DUAL 74ALVCH16821 56 Pins 40μA 74ALVCH Series 56-TFSOP (0.240, 6.10mm Width)(Kg)

Details

Tags

Parameters
Part Status	Active
Moisture Sensitivity Level (MSL)	1 (Unlimited)
Number of Terminations	56
ECCN Code	EAR99
Type	D-Type
Terminal Finish	Nickel/Palladium/Gold (Ni/Pd/Au)
Subcategory	FF/Latches
Packing Method	TR
Technology	CMOS
Voltage - Supply	1.65V~3.6V
Terminal Position	DUAL
Terminal Form	GULL WING
Peak Reflow Temperature (Cel)	260
Supply Voltage	1.8V
Terminal Pitch	0.5mm
Time@Peak Reflow Temperature-Max (s)	NOT SPECIFIED
Base Part Number	74ALVCH16821
Function	Standard
Qualification Status	Not Qualified
Output Type	Tri-State, Non-Inverted
Number of Elements	2
Polarity	Non-Inverting
Supply Voltage-Min (Vsup)	1.65V
Load Capacitance	50pF
Number of Ports	2
Output Current	24mA
Number of Bits	20
Clock Frequency	150MHz
Propagation Delay	5.3 ns
Turn On Delay Time	1 ns
Family	ALVC/VCX/A
Logic Function	D-Type, Flip-Flop
Current - Quiescent (Iq)	40μA
Current - Output High, Low	24mA 24mA
Number of Bits per Element	10
Max Propagation Delay @ V, Max CL	4.5ns @ 3.3V, 50pF
Prop. Delay@Nom-Sup	4.5 ns
Trigger Type	Positive Edge
Input Capacitance	3.5pF
Power Supply Current-Max (ICC)	0.04mA
Number of Output Lines	3
Count Direction	UNIDIRECTIONAL
Clock Edge Trigger Type	Positive Edge
Translation	N/A
Max Frequency@Nom-Sup	150000000Hz
Height	1.2mm
Length	14mm
Width	6.1mm
Thickness	1.15mm
RoHS Status	ROHS3 Compliant
Lead Free	Lead Free
Factory Lead Time	1 Week
Lifecycle Status	ACTIVE (Last Updated: 2 days ago)
Mount	Surface Mount
Mounting Type	Surface Mount
Package / Case	56-TFSOP (0.240, 6.10mm Width)
Number of Pins	56
Weight	252.792698mg
Operating Temperature	-40°C~85°C TA
Packaging	Cut Tape (CT)
Series	74ALVCH
JESD-609 Code	e4
Pbfree Code	yes

SN74ALVCH16821DGGR Overview

The item is packaged in 56-TFSOP (0.240, 6.10mm Width)cases. You can find it in the Cut Tape (CT)package. It is configured with Tri-State, Non-Invertedas an output. This trigger is configured to use Positive Edge. The electronic part is mounted in the way of Surface Mount. The JK flip flop operates with an input voltage of 1.65V~3.6V volts. A temperature of -40°C~85°C TAis used in the operation. It is an electronic flip flop with the type D-Type. The 74ALVCHseries comprises this type of FPGA. Its output frequency should not exceed 150MHz. The element count is 2 . As a result, it consumes 40μA of quiescent current without being affected by external factors. In 56terminations, a transmission line is terminated with a JK flip flop that matches its characteristic impedance. The 74ALVCH16821 family contains this object. It is powered by a voltage of 1.8V . The input capacitance of this T flip flop is 3.5pF farads, which is defined as the capacitance between the input terminals of an op amp with either input grounded. This D flip flop belongs to the family of ALVC/VCX/A. There is an electronic part mounted in the way of Surface Mount. There are 56pins on it. Its clock edge trigger type is Positive Edge. It is included in FF/Latches. There are 20bits in this flip flop. The supply voltage (Vsup) should be maintained above 1.65V for normal operation. Compared to other similar T flip flops, this device offers reliable performance and is well suited for TR. This D flip flop is equipped with 0 ports. Featuring the maximum design flexibility, it has an output current of 24mA . In order to operate, the chip has 3 output lines.