SN74ALVCH16823DGGR
| Parameters | |
|---|---|
| Turn On Delay Time | 1 ns |
| Family | ALVC/VCX/A |
| Logic Function | D-Type, Flip-Flop |
| Current - Output High, Low | 24mA 24mA |
| Number of Bits per Element | 9 |
| Max Propagation Delay @ V, Max CL | 3.5ns @ 3.3V, 30pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 4.5pF |
| Power Supply Current-Max (ICC) | 0.04mA |
| Number of Output Lines | 3 |
| Count Direction | UNIDIRECTIONAL |
| Clock Edge Trigger Type | Positive Edge |
| Translation | N/A |
| Max Frequency@Nom-Sup | 150000000Hz |
| Height | 1.2mm |
| Length | 14mm |
| Width | 6.1mm |
| Thickness | 1.15mm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 1 day ago) |
| Contact Plating | Gold |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 56-TFSOP (0.240, 6.10mm Width) |
| Number of Pins | 56 |
| Weight | 252.792698mg |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Cut Tape (CT) |
| Series | 74ALVCH |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 56 |
| Type | D-Type |
| Additional Feature | WITH CLEAR AND CLOCK ENABLE |
| Subcategory | FF/Latches |
| Packing Method | TR |
| Technology | CMOS |
| Voltage - Supply | 1.65V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 1.8V |
| Terminal Pitch | 0.5mm |
| Base Part Number | 74ALVCH16823 |
| Function | Master Reset |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 2 |
| Polarity | Non-Inverting |
| Supply Voltage-Min (Vsup) | 1.65V |
| Load Capacitance | 50pF |
| Number of Ports | 2 |
| Number of Bits | 18 |
| Clock Frequency | 250MHz |
| Propagation Delay | 3.5 ns |
| Quiescent Current | 40μA |
SN74ALVCH16823DGGR Overview
The flip flop is packaged in 56-TFSOP (0.240, 6.10mm Width). There is an embedded version in the package Cut Tape (CT). T flip flop uses Tri-State, Non-Invertedas the output. It is configured with the trigger Positive Edge. This electronic part is mounted in the way of Surface Mount. A supply voltage of 1.65V~3.6V is required for operation. The operating temperature is -40°C~85°C TA. This logic flip flop is classified as type D-Type. It belongs to the 74ALVCHseries of FPGAs. Its output frequency should not exceed 250MHz. There are 2 elements in it. Currently, there are 56 terminations. JK flip flop belongs to 74ALVCH16823 family. Power is provided by a 1.8V supply. This JK flip flop has a 4.5pFfarad input capacitance. Electronic devices of this type belong to the ALVC/VCX/Afamily. The electronic part is mounted in the way of Surface Mount. The 56pins are designed into the board. This device has the clock edge trigger type of Positive Edge. The RS flip flops belongs to FF/Latches base part number. An electronic part with 18bits has been designed. Normal operation requires a supply voltage (Vsup) above 1.65V. In light of its reliable performance, this T flip flop is well suited for TR. There are 2 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line. There are no output lines on the JK flip flop. In terms of quiescent current, it consumes 40μA . Additionally, there are WITH CLEAR AND CLOCK ENABLE on the electronic flip flop that can be referred to.
SN74ALVCH16823DGGR Features
Cut Tape (CT) package
74ALVCH series
56 pins
18 Bits
SN74ALVCH16823DGGR Applications
There are a lot of Texas Instruments SN74ALVCH16823DGGR Flip Flops applications.
- Frequency Dividers
- Data transfer
- Event Detectors
- EMI reduction circuitry
- Bus hold
- Memory
- Data storage
- Storage Registers
- Parallel data storage
- Cold spare funcion
