SN74AUP1G79DPWR
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 3 days ago) |
| Mounting Type | Surface Mount |
| Package / Case | 5-XFDFN Exposed Pad |
| Surface Mount | YES |
| Number of Pins | 5 |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74AUP |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 5 |
| ECCN Code | EAR99 |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Technology | CMOS |
| Voltage - Supply | 0.8V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | NO LEAD |
| Peak Reflow Temperature (Cel) | NOT SPECIFIED |
| Supply Voltage | 1.2V |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | 74AUP1G79 |
| Function | Standard |
| Output Type | Non-Inverted |
| Number of Elements | 1 |
| Supply Voltage-Max (Vsup) | 3.6V |
| Supply Voltage-Min (Vsup) | 0.8V |
| Number of Bits | 1 |
| Clock Frequency | 266MHz |
| Family | AUP/ULP/V |
| Current - Quiescent (Iq) | 500nA |
| Current - Output High, Low | 4mA 4mA |
| Output Polarity | TRUE |
| Max I(ol) | 0.004 A |
| Max Propagation Delay @ V, Max CL | 5.8ns @ 3.3V, 30pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 1.5pF |
| Propagation Delay (tpd) | 24 ns |
| Height | 0m |
| Length | 800μm |
| Width | 800μm |
| Thickness | 370μm |
| RoHS Status | ROHS3 Compliant |
SN74AUP1G79DPWR Overview
The flip flop is packaged in a case of 5-XFDFN Exposed Pad. You can find it in the Tape & Reel (TR)package. Currently, the output is configured to use Non-Inverted. The trigger configured with it uses Positive Edge. Surface Mountis in the way of this electric part. With a supply voltage of 0.8V~3.6V volts, it operates. Temperature is set to -40°C~85°C TA. A flip flop of this type is classified as a D-Type. In terms of FPGAs, it belongs to the 74AUP series. It should not exceed 266MHzin its output frequency. In total, it contains 1 elements. It consumes 500nA of quiescent There have been 5 terminations. JK flip flop belongs to 74AUP1G79 family. The power supply voltage is 1.2V. This T flip flop has a capacitance of 1.5pF farads at the input. It is a member of the AUP/ULP/Vfamily of D flip flop. This board is designed with 5pins on it. The flip flop is designed with 1bits. It reaches the maximum supply voltage (Vsup) at 3.6V. Keeping the supply voltage (Vsup) above 0.8V is necessary for normal operation.
SN74AUP1G79DPWR Features
Tape & Reel (TR) package
74AUP series
5 pins
1 Bits
SN74AUP1G79DPWR Applications
There are a lot of Texas Instruments SN74AUP1G79DPWR Flip Flops applications.
- Event Detectors
- Reduced system switching noise
- ESCC
- Control circuits
- Pattern generators
- Registers
- Individual Asynchronous Resets
- Modulo – n – counter
- Computing
- Convert a momentary switch to a toggle switch
