SN74AUP1G79DRYR
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 1 week ago) |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 6-UFDFN |
| Number of Pins | 6 |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74AUP |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 6 |
| ECCN Code | EAR99 |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory | FF/Latches |
| Packing Method | TR |
| Technology | CMOS |
| Voltage - Supply | 0.8V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | NO LEAD |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 1.2V |
| Terminal Pitch | 0.5mm |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | 74AUP1G79 |
| Function | Standard |
| Number of Outputs | 1 |
| Qualification Status | Not Qualified |
| Output Type | Non-Inverted |
| Polarity | Non-Inverting |
| Supply Voltage-Min (Vsup) | 0.8V |
| Load Capacitance | 30pF |
| Number of Bits | 1 |
| Clock Frequency | 266MHz |
| Propagation Delay | 24 ns |
| Turn On Delay Time | 3 ns |
| Family | AUP/ULP/V |
| Current - Quiescent (Iq) | 500nA |
| Current - Output High, Low | 4mA 4mA |
| Max I(ol) | 0.004 A |
| Max Propagation Delay @ V, Max CL | 5.8ns @ 3.3V, 30pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 1.5pF |
| Power Supply Current-Max (ICC) | 0.0009mA |
| Clock Edge Trigger Type | Positive Edge |
| Max Frequency@Nom-Sup | 220000000Hz |
| Height | 600μm |
| Length | 1.45mm |
| Width | 1mm |
| Thickness | 500μm |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
SN74AUP1G79DRYR Overview
As a result, it is packaged as 6-UFDFN. The Tape & Reel (TR)package contains it. As configured, the output uses Non-Inverted. There is a trigger configured with Positive Edge. Surface Mountis positioned in the way of this electronic part. A voltage of 0.8V~3.6Vis required for its operation. Currently, the operating temperature is -40°C~85°C TA. This electronic flip flop is of type D-Type. It belongs to the 74AUPseries of FPGAs. It should not exceed 266MHzin terms of its output frequency. Despite external influences, it consumes 500nAof quiescent current. The number of terminations is 6. JK flip flop belongs to 74AUP1G79 family. A voltage of 1.2V provides power to the D latch. The input capacitance of this JK flip flopis 1.5pF farads. The electronic device belongs to the AUP/ULP/Vfamily. In this case, the electronic component is mounted in the way of Surface Mount. This board is designed with 6pins on it. In this device, the clock edge trigger type is Positive Edge. There is a base part number FF/Latchesfor the RS flip flops. The design is based on 1bits. It is imperative that the supply voltage (Vsup) is maintained above 0.8Vin order to ensure normal operation. In view of its reliability, this D flip flop is a good fit for TR.
SN74AUP1G79DRYR Features
Tape & Reel (TR) package
74AUP series
6 pins
1 Bits
SN74AUP1G79DRYR Applications
There are a lot of Texas Instruments SN74AUP1G79DRYR Flip Flops applications.
- Data storage
- EMI reduction circuitry
- Functionally equivalent to the MC10/100EL29
- Circuit Design
- Pattern generators
- Balanced 24 mA output drivers
- Instrumentation
- Latch
- Frequency Dividers
- Buffer registers
