SN74AUP2G79YFPR
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 2 days ago) |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 8-XFBGA, DSBGA |
| Number of Pins | 8 |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74AUP |
| JESD-609 Code | e1 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 8 |
| ECCN Code | EAR99 |
| Type | D-Type |
| Terminal Finish | Tin/Silver/Copper (Sn/Ag/Cu) |
| Subcategory | FF/Latches |
| Packing Method | TR |
| Technology | CMOS |
| Voltage - Supply | 0.8V~3.6V |
| Terminal Position | BOTTOM |
| Terminal Form | BALL |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 1.2V |
| Terminal Pitch | 0.4mm |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | 74AUP2G79 |
| Function | Standard |
| Qualification Status | Not Qualified |
| Output Type | Non-Inverted |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 3.6V |
| Load Capacitance | 30pF |
| Clock Frequency | 266MHz |
| Propagation Delay | 24 ns |
| Turn On Delay Time | 3 ns |
| Family | AUP/ULP/V |
| Current - Quiescent (Iq) | 500nA |
| Current - Output High, Low | 4mA 4mA |
| Max I(ol) | 0.004 A |
| Number of Gates | 2 |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 6.3ns @ 3.3V, 30pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 1.5pF |
| Power Supply Current-Max (ICC) | 0.0009mA |
| Clock Edge Trigger Type | Positive Edge |
| Height | 500μm |
| Length | 0m |
| Width | 0m |
| Thickness | 0m |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
SN74AUP2G79YFPR Overview
In the form of 8-XFBGA, DSBGA, it has been packaged. The Tape & Reel (TR)package contains it. This output is configured with Non-Inverted. JK flip flop uses Positive Edgeas the trigger. There is an electric part mounted in the way of Surface Mount. The JK flip flop operates at a voltage of 0.8V~3.6V. A temperature of -40°C~85°C TAis considered to be the operating temperature. D-Typedescribes this flip flop. The 74AUPseries comprises this type of FPGA. It should not exceed 266MHzin its output frequency. Despite external influences, it consumes 500nAof quiescent current. 8terminations have occurred. You can search similar parts based on 74AUP2G79. The power supply voltage is 1.2V. A 1.5pFfarad input capacitance is provided by this T flip flop. This D flip flop belongs to the family of AUP/ULP/V. There is an electronic component mounted in the way of Surface Mount. The electronic flip flop is designed with pins 8. There is a clock edge trigger type of Positive Edgeon this device. The part you are looking for is included in FF/Latches. It reaches 3.6Vwhen the maximum supply voltage (Vsup) is applied. Due to its reliability, this T flip flop is well suited for TR. Its basic building block contains 2 gates.
SN74AUP2G79YFPR Features
Tape & Reel (TR) package
74AUP series
8 pins
2 gates
SN74AUP2G79YFPR Applications
There are a lot of Texas Instruments SN74AUP2G79YFPR Flip Flops applications.
- Registers
- Communications
- Automotive
- ESD performance
- Memory
- Event Detectors
- Storage Registers
- Balanced Propagation Delays
- Computers
- Common Clocks
