SN74HC374PWR
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 4 days ago) |
| Contact Plating | Gold |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 20-TSSOP (0.173, 4.40mm Width) |
| Number of Pins | 20 |
| Weight | 76.997305mg |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Cut Tape (CT) |
| Series | 74HC |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 20 |
| ECCN Code | EAR99 |
| Type | D-Type |
| Subcategory | FF/Latches |
| Packing Method | TR |
| Technology | CMOS |
| Voltage - Supply | 2V~6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 5V |
| Terminal Pitch | 0.65mm |
| Base Part Number | 74HC374 |
| Function | Standard |
| Output Type | Tri-State, Non-Inverted |
| Operating Supply Voltage | 5V |
| Number of Elements | 1 |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 6V |
| Power Supplies | 2/6V |
| Supply Voltage-Min (Vsup) | 2V |
| Number of Circuits | 8 |
| Load Capacitance | 50pF |
| Number of Ports | 2 |
| Output Current | 7.8mA |
| Number of Bits | 8 |
| Clock Frequency | 70MHz |
| Propagation Delay | 230 ns |
| Quiescent Current | 8μA |
| Turn On Delay Time | 15 ns |
| Family | HC/UH |
| Logic Function | D-Type, Flip-Flop |
| Current - Output High, Low | 7.8mA 7.8mA |
| Max Propagation Delay @ V, Max CL | 31ns @ 6V, 50pF |
| Prop. Delay@Nom-Sup | 45 ns |
| Trigger Type | Positive Edge |
| Input Capacitance | 3pF |
| Number of Input Lines | 3 |
| Count Direction | UNIDIRECTIONAL |
| Clock Edge Trigger Type | Positive Edge |
| Max Frequency@Nom-Sup | 24000000Hz |
| Height | 1.2mm |
| Length | 6.5mm |
| Width | 4.4mm |
| Thickness | 1mm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
SN74HC374PWR Overview
The package is in the form of 20-TSSOP (0.173, 4.40mm Width). It is contained within the Cut Tape (CT)package. T flip flop uses Tri-State, Non-Invertedas its output configuration. It is configured with the trigger Positive Edge. There is an electric part mounted in the way of Surface Mount. The JK flip flop operates at 2V~6Vvolts. In the operating environment, the temperature is -40°C~85°C TA. It belongs to the type D-Typeof flip flops. FPGAs belonging to the 74HCseries contain this type of chip. There should be no greater frequency than 70MHzon its output. A total of 1elements are present in it. 20terminations have occurred. D latch belongs to the 74HC374 family. A voltage of 5V is used to power it. JK flip flop input capacitance is 3pF farads. Devices in the HC/UHfamily are electronic devices. There is an electronic component mounted in the way of Surface Mount. This board has 20 pins. Edge triggering is a type of triggering that allows a circuit to become active at the positive edge or the negative edge of the clock signal. The clock edge trigger type of this device is Positive Edge. This RS flip flops is a part number FF/Latches. 8bits are used in its design. Vsup reaches its maximum value at 6V. Normally, the supply voltage (Vsup) should be above 2V. The superior flexibility is achieved through the use of 8 circuits. In light of its reliable performance, this T flip flop is well suited for TR. The D latch operates on 2/6V volts. The D flip flop is embedded with 2ports. It is recommended that the supply voltage be kept at 5Vto maximize efficiency. In addition to its maximum design flexibility, the output current of the T flip flop is 7.8mA. Currently, there are 3 lines of input. This D latch consumes 8μA quiescent current at all.
SN74HC374PWR Features
Cut Tape (CT) package
74HC series
20 pins
8 Bits
2/6V power supplies
SN74HC374PWR Applications
There are a lot of Texas Instruments SN74HC374PWR Flip Flops applications.
- Latch
- Test & Measurement
- Count Modes
- 2 – Bit synchronous counter
- Single Up Count-Control Line
- Counters
- Control circuits
- Modulo – n – counter
- Bus hold
- Common Clocks
