Parameters |
Turn On Delay Time |
13 ns |
Family |
LS |
Logic Function |
AND, Flip-Flop, JK-Type |
Current - Output High, Low |
400μA 8mA |
Max I(ol) |
0.008 A |
Number of Bits per Element |
1 |
Max Propagation Delay @ V, Max CL |
25ns @ 5V, 15pF |
Trigger Type |
Positive Edge |
Schmitt Trigger |
No |
Number of Input Lines |
5 |
Clock Edge Trigger Type |
Positive Edge |
Height |
1.75mm |
Length |
9.9mm |
Width |
3.91mm |
Thickness |
1.58mm |
RoHS Status |
ROHS3 Compliant |
Lead Free |
Lead Free |
Factory Lead Time |
1 Week |
Lifecycle Status |
ACTIVE (Last Updated: 1 week ago) |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
16-SOIC (0.154, 3.90mm Width) |
Number of Pins |
16 |
Weight |
141.690917mg |
Operating Temperature |
0°C~70°C TA |
Packaging |
Tape & Reel (TR) |
Series |
74LS |
JESD-609 Code |
e4 |
Pbfree Code |
yes |
Part Status |
Active |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
16 |
Type |
JK Type |
Terminal Finish |
Nickel/Palladium/Gold (Ni/Pd/Au) |
Additional Feature |
INVERTED K INPUT |
Subcategory |
FF/Latches |
Packing Method |
TR |
Technology |
TTL |
Voltage - Supply |
4.75V~5.25V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
5V |
Time@Peak Reflow Temperature-Max (s) |
NOT SPECIFIED |
Base Part Number |
74LS109 |
Function |
Set(Preset) and Reset |
Qualification Status |
Not Qualified |
Output Type |
Differential |
Operating Supply Voltage |
5V |
Polarity |
Non-Inverting |
Power Supplies |
5V |
Number of Circuits |
2 |
Output Current |
8mA |
Clock Frequency |
33MHz |
Propagation Delay |
40 ns |
SN74LS109ADRE4 Overview
The package is in the form of 16-SOIC (0.154, 3.90mm Width). It is contained within the Tape & Reel (TR)package. The output it is configured with uses Differential. The trigger it is configured with uses Positive Edge. It is mounted in the way of Surface Mount. The supply voltage is set to 4.75V~5.25V. The operating temperature is 0°C~70°C TA. The type of this D latch is JK Type. It belongs to the 74LSseries of FPGAs. You should not exceed 33MHzin its output frequency. A total of 16terminations have been recorded. D latch belongs to the 74LS109 family. Power is supplied from a voltage of 5V volts. An electronic device belonging to the family LScan be found here. A part of the electronic system is mounted in the way of Surface Mount. A total of 16pins are provided on this board. In this device, the clock edge trigger type is Positive Edge. It is included in FF/Latches. To achieve this superior flexibility, 2 circuits are used. Compared to other similar T flip flops, this device offers reliable performance and is well suited for TR. A total of 5V power supplies are needed to run it. For high efficiency, the supply voltage should be set to 5V. The 8mA output current allows it to be designed with the greatest amount of flexibility. As of now, there are 5input lines. Additionally, there are INVERTED K INPUT on the electronic flip flop that can be referred to.
SN74LS109ADRE4 Features
Tape & Reel (TR) package
74LS series
16 pins
5V power supplies
SN74LS109ADRE4 Applications
There are a lot of Texas Instruments SN74LS109ADRE4 Flip Flops applications.
- Synchronous counter
- ESD protection
- Single Up Count-Control Line
- Storage Registers
- Cold spare funcion
- ESCC
- Buffered Clock
- Circuit Design
- Storage registers
- Counters