SN74LV174ADE4
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 4 days ago) |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 16-SOIC (0.154, 3.90mm Width) |
| Number of Pins | 16 |
| Weight | 141.690917mg |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tube |
| Series | 74LV |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 16 |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory | FF/Latches |
| Technology | CMOS |
| Voltage - Supply | 2V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 2.5V |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | 74LV174 |
| Function | Master Reset |
| Qualification Status | Not Qualified |
| Output Type | Non-Inverted |
| Number of Elements | 1 |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 5.5V |
| Power Supplies | 3.3V |
| Supply Voltage-Min (Vsup) | 2V |
| Number of Circuits | 7 |
| Load Capacitance | 50pF |
| Output Current | 12mA |
| Clock Frequency | 180MHz |
| Propagation Delay | 20.6 ns |
| Turn On Delay Time | 3 ns |
| Family | LV/LV-A/LVX/H |
| Logic Function | D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 20μA |
| Current - Output High, Low | 12mA 12mA |
| Number of Bits per Element | 6 |
| Max Propagation Delay @ V, Max CL | 9.2ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 1.7pF |
| Number of Input Lines | 2 |
| Clock Edge Trigger Type | Positive Edge |
| Max Frequency@Nom-Sup | 50000000Hz |
| Height | 1.75mm |
| Length | 9.9mm |
| Width | 3.91mm |
| Thickness | 1.58mm |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
SN74LV174ADE4 Overview
It is embeded in 16-SOIC (0.154, 3.90mm Width) case. The Tubepackage contains it. T flip flop uses Non-Invertedas its output configuration. JK flip flop uses Positive Edgeas the trigger. Surface Mountmounts this electrical part. A 2V~5.5Vsupply voltage is required for it to operate. In this case, the operating temperature is -40°C~85°C TA. D-Typeis the type of this D latch. This type of FPGA is a part of the 74LV series. This D flip flop should not have a frequency greater than 180MHz. A total of 1 elements are present. It consumes 20μA of quiescent current without being affected by external factors. There are 16 terminations,If you search by 74LV174, you will find similar parts. The power supply voltage is 2.5V. There is 1.7pF input capacitance for this T flip flop. It is a member of the LV/LV-A/LVX/Hfamily of D flip flop. The electronic part is mounted in the way of Surface Mount. This board is designed with 16pins on it. This device has the clock edge trigger type of Positive Edge. This RS flip flops is a part number FF/Latches. It reaches 5.5Vwhen the maximum supply voltage (Vsup) is applied. A normal operating voltage (Vsup) should remain above 2V. Due to its superior flexibility, it uses 7 circuits. An electrical current of 3.3V volts is applied to it. With an output current of 12mA, it is possible to design the device in any way you want. Currently, there are 2 input lines present.
SN74LV174ADE4 Features
Tube package
74LV series
16 pins
3.3V power supplies
SN74LV174ADE4 Applications
There are a lot of Texas Instruments SN74LV174ADE4 Flip Flops applications.
- Data transfer
- Storage registers
- Patented noise
- Latch
- CMOS Process
- Storage Registers
- Counters
- Digital electronics systems
- Shift Registers
- Balanced Propagation Delays
