SN74LV273ADW
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 3 days ago) |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 20-SOIC (0.295, 7.50mm Width) |
| Number of Pins | 20 |
| Weight | 500.709277mg |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tube |
| Series | 74LV |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 20 |
| ECCN Code | EAR99 |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory | FF/Latches |
| Technology | CMOS |
| Voltage - Supply | 2V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 2.5V |
| Base Part Number | 74LV273 |
| Function | Master Reset |
| Output Type | Non-Inverted |
| Number of Elements | 1 |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 5.5V |
| Power Supplies | 3.3V |
| Supply Voltage-Min (Vsup) | 2V |
| Number of Circuits | 8 |
| Load Capacitance | 50pF |
| Output Current | 12mA |
| Number of Bits | 8 |
| Clock Frequency | 160MHz |
| Propagation Delay | 22.1 ns |
| Turn On Delay Time | 4.8 ns |
| Family | LV/LV-A/LVX/H |
| Logic Function | D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 20μA |
| Current - Output High, Low | 12mA 12mA |
| Max Propagation Delay @ V, Max CL | 10.5ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 2pF |
| Number of Input Lines | 2 |
| Clock Edge Trigger Type | Positive Edge |
| Max Frequency@Nom-Sup | 45000000Hz |
| Height | 2.65mm |
| Length | 12.8mm |
| Width | 7.5mm |
| Thickness | 2.35mm |
| Radiation Hardening | No |
| REACH SVHC | No SVHC |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
SN74LV273ADW Overview
The flip flop is packaged in 20-SOIC (0.295, 7.50mm Width). As part of the package Tube, it is embedded. In the configuration, Non-Invertedis used as the output. It is configured with a trigger that uses Positive Edge. It is mounted in the way of Surface Mount. The JK flip flop operates at a voltage of 2V~5.5V. In the operating environment, the temperature is -40°C~125°C TA. This logic flip flop is classified as type D-Type. The 74LVseries comprises this type of FPGA. A frequency of 160MHzshould be the maximum output frequency. D latch consists of 1 elements. There is a consumption of 20μAof quiescent energy. The number of terminations is 20. JK flip flop belongs to 74LV273 family. It is powered by a voltage of 2.5V . Its input capacitance is 2pFfarads. In terms of electronic devices, this device belongs to the LV/LV-A/LVX/Hfamily of devices. The electronic part is mounted in the way of Surface Mount. There are 20pins on it. In this device, the clock edge trigger type is Positive Edge. This device has the base part number FF/Latches. The flip flop is designed with 8bits. It reaches 5.5Vwhen the maximum supply voltage (Vsup) is applied. If you want to maintain normal operation, you should keep the supply voltage (Vsup) above 2V. The superior flexibility of this circuit is achieved by using 8 circuits. The D latch runs on a voltage of 3.3V volts. In addition to its maximum design flexibility, the output current of the T flip flop is 12mA. As of now, there are 2input lines.
SN74LV273ADW Features
Tube package
74LV series
20 pins
8 Bits
3.3V power supplies
SN74LV273ADW Applications
There are a lot of Texas Instruments SN74LV273ADW Flip Flops applications.
- ESD performance
- Individual Asynchronous Resets
- Single Down Count-Control Line
- Balanced 24 mA output drivers
- Digital electronics systems
- Test & Measurement
- Pattern generators
- Asynchronous counter
- Synchronous counter
- Modulo – n – counter
