SN74LV273ANSR
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 4 days ago) |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 20-SOIC (0.209, 5.30mm Width) |
| Number of Pins | 20 |
| Weight | 266.712314mg |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74LV |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 20 |
| Termination | SMD/SMT |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory | FF/Latches |
| Packing Method | TR |
| Technology | CMOS |
| Voltage - Supply | 2V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 2.5V |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | 74LV273 |
| Function | Master Reset |
| Qualification Status | Not Qualified |
| Output Type | Non-Inverted |
| Operating Supply Voltage | 5V |
| Number of Elements | 1 |
| Polarity | Non-Inverting |
| Power Supplies | 3.3V |
| Supply Voltage-Min (Vsup) | 2V |
| Number of Circuits | 8 |
| Load Capacitance | 50pF |
| Output Current | 12mA |
| Number of Bits | 8 |
| Clock Frequency | 160MHz |
| Propagation Delay | 22.1 ns |
| Turn On Delay Time | 4.8 ns |
| Family | LV/LV-A/LVX/H |
| Logic Function | D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 20μA |
| Current - Output High, Low | 12mA 12mA |
| Max Propagation Delay @ V, Max CL | 11ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 2pF |
| Number of Input Lines | 2 |
| Clock Edge Trigger Type | Positive Edge |
| Max Frequency@Nom-Sup | 45000000Hz |
| Height | 2mm |
| Length | 12.6mm |
| Width | 5.3mm |
| Thickness | 1.95mm |
| REACH SVHC | No SVHC |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
SN74LV273ANSR Overview
The package is in the form of 20-SOIC (0.209, 5.30mm Width). There is an embedded version in the package Tape & Reel (TR). T flip flop uses Non-Invertedas its output configuration. It is configured with a trigger that uses a value of Positive Edge. There is an electric part mounted in the way of Surface Mount. A 2V~5.5Vsupply voltage is required for it to operate. A temperature of -40°C~125°C TAis used in the operation. This electronic flip flop is of type D-Type. The FPGA belongs to the 74LV series. This D flip flop should not have a frequency greater than 160MHz. A total of 1elements are present in it. T flip flop consumes 20μA quiescent energy. In 20terminations, a transmission line is terminated with a JK flip flop that matches its characteristic impedance. The object belongs to the 74LV273 family. A voltage of 2.5V provides power to the D latch. Its input capacitance is 2pF farads. In this case, the D flip flop belongs to the LV/LV-A/LVX/Hfamily. It is mounted in the way of Surface Mount. This board has 20 pins. A Positive Edgeclock edge trigger is used in this device. This part is included in FF/Latches. It is designed with a number of bits of 8. Keeping the supply voltage (Vsup) above 2V is necessary for normal operation. In order to achieve its superior flexibility, 8 circuits are used. As a result of its reliability, this D flip flop is ideally suited for TR. A total of 3.3V power supplies are needed to run it. High efficiency requires the supply voltage to be maintained at 5V. Featuring the maximum design flexibility, it has an output current of 12mA . Currently, there are 2 lines of input.
SN74LV273ANSR Features
Tape & Reel (TR) package
74LV series
20 pins
8 Bits
3.3V power supplies
SN74LV273ANSR Applications
There are a lot of Texas Instruments SN74LV273ANSR Flip Flops applications.
- EMI reduction circuitry
- Buffered Clock
- Common Clocks
- Data transfer
- Instrumentation
- Latch-up performance
- Computers
- Frequency division
- Digital electronics systems
- Bounce elimination switch
