SN74LV374ADWG4
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 6 days ago) |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 20-SOIC (0.295, 7.50mm Width) |
| Number of Pins | 20 |
| Weight | 500.709277mg |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tube |
| Series | 74LV |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 20 |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory | FF/Latches |
| Technology | CMOS |
| Voltage - Supply | 2V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 2.5V |
| Base Part Number | 74LV374 |
| Function | Standard |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 1 |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 5.5V |
| Power Supplies | 3.3V |
| Supply Voltage-Min (Vsup) | 2V |
| Load Capacitance | 50pF |
| Number of Ports | 2 |
| Output Current | 16mA |
| Number of Bits | 8 |
| Clock Frequency | 170MHz |
| Propagation Delay | 19.3 ns |
| Turn On Delay Time | 4.9 ns |
| Family | LV/LV-A/LVX/H |
| Logic Function | D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 20μA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 16mA 16mA |
| Max Propagation Delay @ V, Max CL | 10.1ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 2.9pF |
| Power Supply Current-Max (ICC) | 0.02mA |
| Number of Input Lines | 8 |
| Count Direction | UNIDIRECTIONAL |
| Clock Edge Trigger Type | Positive Edge |
| Translation | N/A |
| Max Frequency@Nom-Sup | 50000000Hz |
| Height | 2.65mm |
| Length | 12.8mm |
| Width | 7.5mm |
| Thickness | 2.35mm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
SN74LV374ADWG4 Overview
The flip flop is packaged in 20-SOIC (0.295, 7.50mm Width). It is included in the package Tube. There is a Tri-State, Non-Invertedoutput configured with it. This trigger is configured to use Positive Edge. There is an electric part mounted in the way of Surface Mount. The JK flip flop operates with an input voltage of 2V~5.5V volts. A temperature of -40°C~85°C TAis considered to be the operating temperature. The type of this D latch is D-Type. The 74LVseries comprises this type of FPGA. There should be no greater frequency than 170MHzon its output. In total, it contains 1 elements. There is 20μA quiescent consumption. Terminations are 20. You can search similar parts based on 74LV374. It is powered by a voltage of 2.5V . Input capacitance of this device is 2.9pF farads. LV/LV-A/LVX/His the family of this D flip flop. There is an electronic part that is mounted in the way of Surface Mount. With its 20pins, it is designed to work with most electronic flip flops. This device has the clock edge trigger type of Positive Edge. This device has the base part number FF/Latches. The design is based on 8bits. As soon as 5.5Vis reached, Vsup reaches its maximum value. The supply voltage (Vsup) should be kept above 2V for normal operation. In order for the device to operate, it requires 3.3V power supplies. The D flip flop has no ports embedded. Its output current of 16mAallows for maximum design flexibility. It has 8lines.
SN74LV374ADWG4 Features
Tube package
74LV series
20 pins
8 Bits
3.3V power supplies
SN74LV374ADWG4 Applications
There are a lot of Texas Instruments SN74LV374ADWG4 Flip Flops applications.
- CMOS Process
- Automotive
- Control circuits
- Frequency Divider circuits
- Event Detectors
- Storage Registers
- Frequency division
- Computers
- Common Clocks
- Registers
