SN74LV374ATNS
| Parameters | |
|---|---|
| Number of Terminations | 20 |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory | FF/Latches |
| Technology | CMOS |
| Voltage - Supply | 4.5V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 2.5V |
| Base Part Number | 74LV374 |
| Function | Standard |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 1 |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 5.5V |
| Power Supplies | 3.3V |
| Supply Voltage-Min (Vsup) | 2V |
| Number of Circuits | 8 |
| Load Capacitance | 50pF |
| Number of Ports | 2 |
| Output Current | 16mA |
| Number of Bits | 8 |
| Clock Frequency | 150MHz |
| Propagation Delay | 19.3 ns |
| Turn On Delay Time | 4.9 ns |
| Family | LV/LV-A/LVX/H |
| Logic Function | D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 2μA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 16mA 16mA |
| Max Propagation Delay @ V, Max CL | 10.1ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 4pF |
| Number of Input Lines | 2 |
| Clock Edge Trigger Type | Positive Edge |
| Max Frequency@Nom-Sup | 50000000Hz |
| Width | 5.3mm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 20-SOIC (0.209, 5.30mm Width) |
| Number of Pins | 20 |
| Weight | 266.712314mg |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tube |
| Series | 74LV |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
SN74LV374ATNS Overview
The flip flop is packaged in 20-SOIC (0.209, 5.30mm Width). It is included in the package Tube. The output it is configured with uses Tri-State, Non-Inverted. There is a trigger configured with Positive Edge. There is an electronic component mounted in the way of Surface Mount. The supply voltage is set to 4.5V~5.5V. In this case, the operating temperature is -40°C~125°C TA. This D latch has the type D-Type. In this case, it is a type of FPGA belonging to the 74LV series. Its output frequency should not exceed 150MHz. A total of 1elements are contained within it. As a result, it consumes 2μA quiescent current and is not affected by external forces. There are 20 terminations,The 74LV374family includes it. A voltage of 2.5V is used as the power supply for this D latch. The input capacitance of this JK flip flopis 4pF farads. In this case, the D flip flop belongs to the LV/LV-A/LVX/Hfamily. There is an electronic part that is mounted in the way of Surface Mount. With its 20pins, it is designed to work with most electronic flip flops. This device's clock edge trigger type is Positive Edge. It is part of the FF/Latchesbase part number family. The flip flop is designed with 8bits. Vsup reaches 5.5V, the maximal supply voltage. Normally, the supply voltage (Vsup) should be above 2V. 8 circuits are used to achieve its superior flexibility. The D latch operates on 3.3V volts. A D flip flop with 2embedded ports is available. With a current output of 16mA , it offers maximum design flexibility. This input has 2lines in it.
SN74LV374ATNS Features
Tube package
74LV series
20 pins
8 Bits
3.3V power supplies
SN74LV374ATNS Applications
There are a lot of Texas Instruments SN74LV374ATNS Flip Flops applications.
- Latch
- Bounce elimination switch
- Convert a momentary switch to a toggle switch
- Matched Rise and Fall
- Data Synchronizers
- Memory
- Synchronous counter
- Parallel data storage
- Modulo – n – counter
- Registers
