SN74LV74ADBR
| Parameters | |
|---|---|
| Family | LV/LV-A/LVX/H |
| Logic Function | AND, D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 20μA |
| Current - Output High, Low | 12mA 12mA |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 9.3ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 2pF |
| Clock Edge Trigger Type | Positive Edge |
| Max Frequency@Nom-Sup | 45000000Hz |
| Height | 2mm |
| Length | 6.2mm |
| Width | 5.3mm |
| Thickness | 1.95mm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 3 days ago) |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 14-SSOP (0.209, 5.30mm Width) |
| Number of Pins | 14 |
| Weight | 121.789551mg |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74LV |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 14 |
| ECCN Code | EAR99 |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory | FF/Latches |
| Packing Method | TR |
| Technology | CMOS |
| Voltage - Supply | 2V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 2.5V |
| Terminal Pitch | 0.65mm |
| Base Part Number | 74LV74 |
| Function | Set(Preset) and Reset |
| Output Type | Differential |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 5.5V |
| Power Supplies | 3.3V |
| Supply Voltage-Min (Vsup) | 2V |
| Number of Circuits | 2 |
| Load Capacitance | 50pF |
| Output Current | 12mA |
| Clock Frequency | 140MHz |
| Propagation Delay | 20 ns |
| Turn On Delay Time | 9.8 ns |
SN74LV74ADBR Overview
14-SSOP (0.209, 5.30mm Width)is the way it is packaged. It is included in the package Tape & Reel (TR). T flip flop is configured with an output of Differential. It is configured with the trigger Positive Edge. Surface Mountmounts this electrical part. A voltage of 2V~5.5Vis used as the supply voltage. A temperature of -40°C~125°C TAis considered to be the operating temperature. D-Typeis the type of this D latch. In FPGA terms, D flip flop is a type of 74LVseries FPGA. There should be no greater frequency than 140MHzon its output. As a result, it consumes 20μA quiescent current and is not affected by external forces. 14terminations have occurred. The 74LV74family includes it. A voltage of 2.5V provides power to the D latch. The input capacitance of this JK flip flopis 2pF farads. The electronic device belongs to the LV/LV-A/LVX/Hfamily. This electronic part is mounted in the way of Surface Mount. With its 14pins, it is designed to work with most electronic flip flops. This device exhibits a clock edge trigger type of Positive Edge. This RS flip flops is a part number FF/Latches. There is a 5.5Vmaximum supply voltage (Vsup). It is imperative that the supply voltage (Vsup) is maintained above 2Vin order to ensure normal operation. Its flexibility is enhanced by 2 circuits. A reliable performance of this D flip flop makes it well suited for use in TR. The D latch runs on a voltage of 3.3V volts. This T flip flop features a maximum design flexibility due to its output current of 12mA.
SN74LV74ADBR Features
Tape & Reel (TR) package
74LV series
14 pins
3.3V power supplies
SN74LV74ADBR Applications
There are a lot of Texas Instruments SN74LV74ADBR Flip Flops applications.
- ATE
- Functionally equivalent to the MC10/100EL29
- Computing
- Automotive
- Single Up Count-Control Line
- Asynchronous counter
- Cold spare funcion
- Divide a clock signal by 2 or 4
- Matched Rise and Fall
- Common Clocks
