SN74LV74ADGVR
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 5 days ago) |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 14-TFSOP (0.173, 4.40mm Width) |
| Number of Pins | 14 |
| Weight | 41.787197mg |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Cut Tape (CT) |
| Series | 74LV |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 14 |
| ECCN Code | EAR99 |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory | FF/Latches |
| Packing Method | TR |
| Technology | CMOS |
| Voltage - Supply | 2V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 2.5V |
| Terminal Pitch | 0.4mm |
| Base Part Number | 74LV74 |
| Function | Set(Preset) and Reset |
| Output Type | Differential |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 5.5V |
| Power Supplies | 3.3V |
| Supply Voltage-Min (Vsup) | 2V |
| Number of Circuits | 2 |
| Load Capacitance | 50pF |
| Output Current | 12mA |
| Clock Frequency | 140MHz |
| Propagation Delay | 17.5 ns |
| Turn On Delay Time | 9.8 ns |
| Family | LV/LV-A/LVX/H |
| Logic Function | AND, D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 20μA |
| Current - Output High, Low | 12mA 12mA |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 9.3ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 2pF |
| Clock Edge Trigger Type | Positive Edge |
| Max Frequency@Nom-Sup | 45000000Hz |
| Height | 1.2mm |
| Length | 3.6mm |
| Width | 4.4mm |
| Thickness | 1.05mm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
SN74LV74ADGVR Overview
The item is packaged in 14-TFSOP (0.173, 4.40mm Width)cases. There is an embedded version in the package Cut Tape (CT). The output it is configured with uses Differential. It is configured with the trigger Positive Edge. There is an electric part mounted in the way of Surface Mount. A supply voltage of 2V~5.5V is required for operation. The operating temperature is -40°C~125°C TA. D-Typeis the type of this D latch. FPGAs belonging to the 74LVseries contain this type of chip. You should not exceed 140MHzin its output frequency. As a result, it consumes 20μA of quiescent current without being affected by external factors. It has been determined that there have been 14 terminations. JK flip flop belongs to 74LV74 family. It is powered from a supply voltage of 2.5V. Its input capacitance is 2pFfarads. This D flip flop belongs to the family of LV/LV-A/LVX/H. Surface Mount mounts this electronic component. With its 14pins, it is designed to work with most electronic flip flops. Edge triggering is a type of triggering that allows a circuit to become active at the positive edge or the negative edge of the clock signal. The clock edge trigger type of this device is Positive Edge. There is a FF/Latchesbase part number assigned to the RS flip flops. Vsup reaches its maximum value at 5.5V. Keeping the supply voltage (Vsup) above 2V is necessary for normal operation. Its flexibility is enhanced by 2 circuits. Considering the reliability of this T flip flop, it is well suited for TR. The system runs on a power supply of 3.3V watts. The 12mA output current allows it to be designed with the greatest amount of flexibility.
SN74LV74ADGVR Features
Cut Tape (CT) package
74LV series
14 pins
3.3V power supplies
SN74LV74ADGVR Applications
There are a lot of Texas Instruments SN74LV74ADGVR Flip Flops applications.
- Functionally equivalent to the MC10/100EL29
- Latch-up performance
- Single Down Count-Control Line
- Frequency division
- Matched Rise and Fall
- Memory
- Common Clocks
- ESD performance
- Buffered Clock
- Safety Clamp
