SN74LVC112ADGVR
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 2 days ago) |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 16-TFSOP (0.173, 4.40mm Width) |
| Number of Pins | 16 |
| Weight | 41.900595mg |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Cut Tape (CT) |
| Series | 74LVC |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 16 |
| ECCN Code | EAR99 |
| Type | JK Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory | FF/Latches |
| Packing Method | TR |
| Technology | CMOS |
| Voltage - Supply | 1.65V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 1.8V |
| Terminal Pitch | 0.4mm |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | 74LVC112 |
| Function | Set(Preset) and Reset |
| Qualification Status | Not Qualified |
| Output Type | Differential |
| Polarity | Non-Inverting |
| Supply Voltage-Min (Vsup) | 2V |
| Number of Circuits | 2 |
| Load Capacitance | 50pF |
| Output Current | 24mA |
| Clock Frequency | 150MHz |
| Propagation Delay | 7.1 ns |
| Turn On Delay Time | 1 ns |
| Family | LVC/LCX/Z |
| Logic Function | AND, Flip-Flop, JK-Type |
| Current - Quiescent (Iq) | 10μA |
| Current - Output High, Low | 24mA 24mA |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 5.9ns @ 3.3V, 50pF |
| Prop. Delay@Nom-Sup | 4.8 ns |
| Trigger Type | Negative Edge |
| Input Capacitance | 4.5pF |
| Schmitt Trigger | No |
| Number of Input Lines | 3 |
| Clock Edge Trigger Type | Negative Edge |
| Height | 1.2mm |
| Length | 3.6mm |
| Width | 4.4mm |
| Thickness | 1.05mm |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
SN74LVC112ADGVR Overview
The package is in the form of 16-TFSOP (0.173, 4.40mm Width). It is contained within the Cut Tape (CT)package. Currently, the output is configured to use Differential. This trigger uses the value Negative Edge. Surface Mountis occupied by this electronic component. A voltage of 1.65V~3.6Vis used as the supply voltage. In this case, the operating temperature is -40°C~85°C TA. It belongs to the type JK Typeof flip flops. The FPGA belongs to the 74LVC series. In order for it to function properly, its output frequency should not exceed 150MHz. T flip flop consumes 10μA quiescent energy. There are 16 terminations,The object belongs to the 74LVC112 family. Power is supplied from a voltage of 1.8V volts. This JK flip flop has a 4.5pFfarad input capacitance. In terms of electronic devices, this device belongs to the LVC/LCX/Zfamily of devices. A part of the electronic system is mounted in the way of Surface Mount. 16pins are included in its design. Edge triggering is a type of triggering that allows a circuit to become active at the positive edge or the negative edge of the clock signal. The clock edge trigger type of this device is Negative Edge. The part you are looking for is included in FF/Latches. For normal operation, the supply voltage (Vsup) should be kept above 2V. Due to its superior flexibility, it uses 2 circuits. This D flip flop is well suited for TR based on its reliable performance. With an output current of 24mA, this device offers maximum design flexibility. 3input lines are available for you to choose from.
SN74LVC112ADGVR Features
Cut Tape (CT) package
74LVC series
16 pins
SN74LVC112ADGVR Applications
There are a lot of Texas Instruments SN74LVC112ADGVR Flip Flops applications.
- Test & Measurement
- Differential Individual
- Data transfer
- Control circuits
- EMI reduction circuitry
- Event Detectors
- Asynchronous counter
- Guaranteed simultaneous switching noise level
- Balanced Propagation Delays
- Shift registers
