SN74LVC112ANSR
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 5 days ago) |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 16-SOIC (0.209, 5.30mm Width) |
| Number of Pins | 16 |
| Weight | 200.686274mg |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74LVC |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 16 |
| ECCN Code | EAR99 |
| Type | JK Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory | FF/Latches |
| Packing Method | TR |
| Technology | CMOS |
| Voltage - Supply | 1.65V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 1.8V |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | 74LVC112 |
| Function | Set(Preset) and Reset |
| Qualification Status | Not Qualified |
| Output Type | Differential |
| Polarity | Non-Inverting |
| Supply Voltage-Min (Vsup) | 2V |
| Number of Circuits | 2 |
| Load Capacitance | 50pF |
| Output Current | 24mA |
| Clock Frequency | 150MHz |
| Propagation Delay | 7.1 ns |
| Turn On Delay Time | 1 ns |
| Family | LVC/LCX/Z |
| Logic Function | AND, Flip-Flop, JK-Type |
| Current - Quiescent (Iq) | 10μA |
| Current - Output High, Low | 24mA 24mA |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 5.9ns @ 3.3V, 50pF |
| Prop. Delay@Nom-Sup | 4.8 ns |
| Trigger Type | Negative Edge |
| Input Capacitance | 4.5pF |
| Schmitt Trigger | No |
| Number of Input Lines | 3 |
| Clock Edge Trigger Type | Negative Edge |
| Height | 2mm |
| Length | 10.3mm |
| Width | 5.3mm |
| Thickness | 1.95mm |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
SN74LVC112ANSR Overview
The flip flop is packaged in a case of 16-SOIC (0.209, 5.30mm Width). A package named Tape & Reel (TR)includes it. This output is configured with Differential. It is configured with the trigger Negative Edge. There is an electrical part that is mounted in the way of Surface Mount. A supply voltage of 1.65V~3.6V is required for operation. It is operating at a temperature of -40°C~85°C TA. Logic flip flops of this type are classified as JK Type. The 74LVCseries comprises this type of FPGA. Its output frequency should not exceed 150MHz. It consumes 10μA of quiescent current without being affected by external factors. Currently, there are 16 terminations. It is a member of the 74LVC112 family. The power source is powered by 1.8V. The input capacitance of this JK flip flopis 4.5pF farads. In terms of electronic devices, this device belongs to the LVC/LCX/Zfamily of devices. There is an electronic component mounted in the way of Surface Mount. 16pins are included in its design. This device has Negative Edgeas its clock edge trigger type. It is included in FF/Latches. Normal operation requires a supply voltage (Vsup) above 2V. Its superior flexibility is attributed to its use of 2 circuits. This D flip flop is well suited for TR based on its reliable performance. Its output current of 24mAallows for maximum design flexibility. As of now, there are 3input lines.
SN74LVC112ANSR Features
Tape & Reel (TR) package
74LVC series
16 pins
SN74LVC112ANSR Applications
There are a lot of Texas Instruments SN74LVC112ANSR Flip Flops applications.
- Event Detectors
- Supports Live Insertion
- Storage Registers
- Balanced Propagation Delays
- Control circuits
- Consumer
- Latch
- Balanced 24 mA output drivers
- QML qualified product
- Single Down Count-Control Line
