SN74LVC1G80YEPR
| Parameters | |
|---|---|
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 5 |
| Type | D-Type |
| Terminal Finish | TIN LEAD |
| Technology | CMOS |
| Voltage - Supply | 1.65V~5.5V |
| Terminal Position | BOTTOM |
| Terminal Form | BALL |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 1.8V |
| Terminal Pitch | 0.5mm |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| JESD-30 Code | R-XBGA-B5 |
| Function | Standard |
| Qualification Status | COMMERCIAL |
| Output Type | Inverted |
| Number of Elements | 1 |
| Supply Voltage-Max (Vsup) | 5.5V |
| Number of Bits | 1 |
| Clock Frequency | 160MHz |
| Family | LVC/LCX/Z |
| Current - Quiescent (Iq) | 10μA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 32mA 32mA |
| Max Propagation Delay @ V, Max CL | 4.5ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 3.5pF |
| Propagation Delay (tpd) | 9.9 ns |
| Height Seated (Max) | 0.5mm |
| Width | 0.9mm |
| RoHS Status | Non-RoHS Compliant |
| Mounting Type | Surface Mount |
| Package / Case | 5-XFBGA, DSBGA |
| Surface Mount | YES |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74LVC |
| JESD-609 Code | e0 |
| Pbfree Code | no |
SN74LVC1G80YEPR Overview
5-XFBGA, DSBGAis the packaging method. A package named Tape & Reel (TR)includes it. The output it is configured with uses Inverted. In the configuration of the trigger, Positive Edgeis used. There is an electrical part that is mounted in the way of Surface Mount. A 1.65V~5.5Vsupply voltage is required for it to operate. In this case, the operating temperature is -40°C~85°C TA. The type of this D latch is D-Type. In FPGA terms, D flip flop is a type of 74LVCseries FPGA. You should not exceed 160MHzin the output frequency of the device. The list contains 1 elements. This process consumes 10μA quiescents. There are 5 terminations,A voltage of 1.8V provides power to the D latch. This T flip flop has a capacitance of 3.5pF farads at the input. This D flip flop belongs to the family of LVC/LCX/Z. It is designed with 1bits. The maximal supply voltage (Vsup) reaches 5.5V.
SN74LVC1G80YEPR Features
Tape & Reel (TR) package
74LVC series
1 Bits
SN74LVC1G80YEPR Applications
There are a lot of Rochester Electronics, LLC SN74LVC1G80YEPR Flip Flops applications.
- QML qualified product
- Reduced system switching noise
- ESD performance
- Pattern generators
- Parallel data storage
- Digital electronics systems
- Buffer registers
- Matched Rise and Fall
- Latch-up performance
- Single Up Count-Control Line
