SN74LVC2G80DCTRG4
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 4 days ago) |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 8-LSSOP, 8-MSOP (0.110, 2.80mm Width) |
| Number of Pins | 8 |
| Weight | 23.388357mg |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74LVC |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 8 |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory | FF/Latches |
| Packing Method | TR |
| Technology | CMOS |
| Voltage - Supply | 1.65V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 1.8V |
| Terminal Pitch | 0.65mm |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | 74LVC2G80 |
| Function | Standard |
| Qualification Status | Not Qualified |
| Output Type | Inverted |
| Polarity | Inverting |
| Supply Voltage-Max (Vsup) | 5.5V |
| Power Supplies | 3.3V |
| Number of Circuits | 2 |
| Load Capacitance | 50pF |
| Clock Frequency | 160MHz |
| Propagation Delay | 5.2 ns |
| Turn On Delay Time | 1.1 ns |
| Family | LVC/LCX/Z |
| Current - Quiescent (Iq) | 5μA |
| Current - Output High, Low | 32mA 32mA |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 4.5ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 3.5pF |
| Power Supply Current-Max (ICC) | 0.005mA |
| Number of Output Lines | 1 |
| Clock Edge Trigger Type | Positive Edge |
| Height | 1.3mm |
| Length | 2.95mm |
| Width | 2.8mm |
| Thickness | 1.29mm |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
SN74LVC2G80DCTRG4 Overview
The item is packaged in 8-LSSOP, 8-MSOP (0.110, 2.80mm Width)cases. There is an embedded version in the package Tape & Reel (TR). T flip flop uses Invertedas the output. In the configuration of the trigger, Positive Edgeis used. Surface Mountmounts this electrical part. The JK flip flop operates with an input voltage of 1.65V~5.5V volts. In this case, the operating temperature is -40°C~125°C TA. Logic flip flops of this type are classified as D-Type. The FPGA belongs to the 74LVC series. A frequency of 160MHzshould be the maximum output frequency. Despite external influences, it consumes 5μAof quiescent current. Terminations are 8. The 74LVC2G80family includes it. An input voltage of 1.8Vpowers the D latch. Input capacitance of this device is 3.5pF farads. It belongs to the family of electronic devices known as LVC/LCX/Z. There is an electronic part mounted in the way of Surface Mount. 8pins are included in its design. Edge triggering is a type of triggering that allows a circuit to become active at the positive edge or the negative edge of the clock signal. The clock edge trigger type of this device is Positive Edge. This device has the base part number FF/Latches. It reaches 5.5Vwhen the maximum supply voltage (Vsup) is applied. 2 circuits are used to achieve its superior flexibility. As a result of its reliable performance, this T flip flop is suitable for TR. The power supply is 3.3V. There are 1 output lines in this JK flip flop.
SN74LVC2G80DCTRG4 Features
Tape & Reel (TR) package
74LVC series
8 pins
3.3V power supplies
SN74LVC2G80DCTRG4 Applications
There are a lot of Texas Instruments SN74LVC2G80DCTRG4 Flip Flops applications.
- Registers
- Frequency Divider circuits
- Buffer registers
- Communications
- High Performance Logic for test systems
- Latch
- Functionally equivalent to the MC10/100EL29
- Set-reset capability
- Computing
- Count Modes
