Parameters |
Factory Lead Time |
1 Week |
Lifecycle Status |
ACTIVE (Last Updated: 2 days ago) |
Contact Plating |
Gold |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
20-TSSOP (0.173, 4.40mm Width) |
Number of Pins |
20 |
Weight |
76.997305mg |
Operating Temperature |
-40°C~125°C TA |
Packaging |
Tube |
Series |
74LVC |
JESD-609 Code |
e4 |
Pbfree Code |
yes |
Part Status |
Active |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
20 |
ECCN Code |
EAR99 |
Type |
D-Type |
Subcategory |
Bus Driver/Transceiver |
Technology |
CMOS |
Voltage - Supply |
1.65V~3.6V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
1.8V |
Terminal Pitch |
0.65mm |
Base Part Number |
74LVC574 |
Function |
Standard |
Output Type |
Tri-State, Non-Inverted |
Number of Elements |
1 |
Polarity |
Non-Inverting |
Number of Circuits |
8 |
Load Capacitance |
50pF |
Number of Ports |
2 |
Output Current |
24mA |
Number of Bits |
8 |
Clock Frequency |
150MHz |
Propagation Delay |
21.6 ns |
Quiescent Current |
1.5μA |
Turn On Delay Time |
7 ns |
Family |
LVC/LCX/Z |
Logic Function |
D-Type, Flip-Flop |
Current - Quiescent (Iq) |
10μA |
Current - Output High, Low |
24mA 24mA |
Max I(ol) |
0.024 A |
Max Propagation Delay @ V, Max CL |
6.8ns @ 3.3V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
4pF |
Number of Input Lines |
3 |
Count Direction |
UNIDIRECTIONAL |
Clock Edge Trigger Type |
Positive Edge |
Height |
1.2mm |
Length |
6.5mm |
Width |
4.4mm |
Thickness |
1mm |
Radiation Hardening |
No |
REACH SVHC |
No SVHC |
RoHS Status |
ROHS3 Compliant |
Lead Free |
Lead Free |
SN74LVC574APW Overview
20-TSSOP (0.173, 4.40mm Width)is the packaging method. Package Tubeembeds it. Tri-State, Non-Invertedis the output configured for it. It is configured with a trigger that uses Positive Edge. There is an electrical part that is mounted in the way of Surface Mount. A supply voltage of 1.65V~3.6V is required for operation. In the operating environment, the temperature is -40°C~125°C TA. D-Typeis the type of this D latch. The FPGA belongs to the 74LVC series. It should not exceed 150MHzin terms of its output frequency. A total of 1elements are present in it. There is 10μA quiescent consumption. There are 20 terminations,This D latch belongs to the family of 74LVC574. An input voltage of 1.8Vpowers the D latch. This T flip flop has a capacitance of 4pF farads at the input. Electronic devices of this type belong to the LVC/LCX/Zfamily. Surface Mount mounts this electronic component. It is designed with 20 pins. This device has Positive Edgeas its clock edge trigger type. This RS flip flops is a part number Bus Driver/Transceiver. The design is based on 8bits. Its superior flexibility is attributed to its use of 8 circuits. A D flip flop with 2embedded ports is available. The output current of 24mA makes it feature maximum design flexibility. It has 3lines. Quiescent current is consumed by the D latch in the amount of 1.5μA.
SN74LVC574APW Features
Tube package
74LVC series
20 pins
8 Bits
SN74LVC574APW Applications
There are a lot of Texas Instruments SN74LVC574APW Flip Flops applications.
- Cold spare funcion
- Shift Registers
- Divide a clock signal by 2 or 4
- High Performance Logic for test systems
- Shift registers
- Frequency Dividers
- Asynchronous counter
- Data Synchronizers
- Set-reset capability
- Guaranteed simultaneous switching noise level