Parameters |
Lifecycle Status |
LIFEBUY (Last Updated: 2 days ago) |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
96-LFBGA |
Number of Pins |
96 |
Weight |
166.610147mg |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Tape & Reel (TR) |
Series |
74LVCH |
JESD-609 Code |
e1 |
Pbfree Code |
yes |
Part Status |
Last Time Buy |
Moisture Sensitivity Level (MSL) |
3 (168 Hours) |
Number of Terminations |
96 |
Type |
D-Type |
Terminal Finish |
Tin/Silver/Copper (Sn/Ag/Cu) |
Additional Feature |
BUS HOLD INPUTS ELIMINATE THE NEED FOR EXTERNAL PULLUP/PULLDOWN RESISTORS |
Subcategory |
FF/Latches |
Packing Method |
TR |
Technology |
CMOS |
Voltage - Supply |
1.65V~3.6V |
Terminal Position |
BOTTOM |
Terminal Form |
BALL |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
1.8V |
Time@Peak Reflow Temperature-Max (s) |
NOT SPECIFIED |
Base Part Number |
74LVCH32374 |
Function |
Standard |
Qualification Status |
Not Qualified |
Output Type |
Tri-State, Non-Inverted |
Number of Elements |
4 |
Polarity |
Non-Inverting |
Supply Voltage-Min (Vsup) |
1.65V |
Load Capacitance |
50pF |
Number of Ports |
2 |
Output Current |
24mA |
Number of Bits |
32 |
Clock Frequency |
150MHz |
Propagation Delay |
4.9 ns |
Turn On Delay Time |
1.5 ns |
Family |
LVC/LCX/Z |
Logic Function |
D-Type, Flip-Flop |
Current - Quiescent (Iq) |
40μA |
Current - Output High, Low |
24mA 24mA |
Number of Bits per Element |
8 |
Max Propagation Delay @ V, Max CL |
4.5ns @ 3.3V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
5pF |
Number of Output Lines |
3 |
Count Direction |
UNIDIRECTIONAL |
Clock Edge Trigger Type |
Positive Edge |
Translation |
N/A |
Max Frequency@Nom-Sup |
150000000Hz |
Height |
1.4mm |
Length |
13.5mm |
Width |
5.5mm |
Thickness |
850μm |
RoHS Status |
ROHS3 Compliant |
Lead Free |
Lead Free |
SN74LVCH32374AZKER Overview
The package is in the form of 96-LFBGA. A package named Tape & Reel (TR)includes it. T flip flop is configured with an output of Tri-State, Non-Inverted. This trigger is configured to use Positive Edge. Surface Mountmounts this electrical part. The JK flip flop operates with an input voltage of 1.65V~3.6V volts. -40°C~85°C TAis the operating temperature. The type of this D latch is D-Type. The FPGA belongs to the 74LVCH series. This D flip flop should not have a frequency greater than 150MHz. D latch consists of 4 elements. T flip flop consumes 40μA quiescent energy. There are 96 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line. The 74LVCH32374 family contains this object. A voltage of 1.8V is used to power it. The input capacitance of this T flip flop is 5pF farads, which is defined as the capacitance between the input terminals of an op amp with either input grounded. It is a member of the LVC/LCX/Zfamily of D flip flop. In this case, the electronic component is mounted in the way of Surface Mount. The 96pins are designed into the board. The clock edge trigger type for this device is Positive Edge. It is included in FF/Latches. The flip flop is designed with 32bits. If you want to maintain normal operation, you should keep the supply voltage (Vsup) above 1.65V. In view of its reliability, this D flip flop is a good fit for TR. The flip flop has 2embedded ports. This T flip flop features a maximum design flexibility due to its output current of 24mA. It operates with 3 output lines. Furthermore, it has BUS HOLD INPUTS ELIMINATE THE NEED FOR EXTERNAL PULLUP/PULLDOWN RESISTORSas a characteristic.
SN74LVCH32374AZKER Features
Tape & Reel (TR) package
74LVCH series
96 pins
32 Bits
SN74LVCH32374AZKER Applications
There are a lot of Texas Instruments SN74LVCH32374AZKER Flip Flops applications.
- Shift Registers
- Counters
- 2 – Bit synchronous counter
- Test & Measurement
- Functionally equivalent to the MC10/100EL29
- Automotive
- Registers
- Latch
- Load Control
- Guaranteed simultaneous switching noise level