SN74LVTH162374DLR
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 6 days ago) |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 48-BSSOP (0.295, 7.50mm Width) |
| Number of Pins | 48 |
| Weight | 600.301152mg |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Cut Tape (CT) |
| Series | 74LVTH |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 48 |
| ECCN Code | EAR99 |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory | FF/Latches |
| Packing Method | TR |
| Technology | BICMOS |
| Voltage - Supply | 2.7V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 3.3V |
| Terminal Pitch | 0.635mm |
| Base Part Number | 74LVTH162374 |
| Function | Standard |
| Output Type | Tri-State, Non-Inverted |
| Operating Supply Voltage | 3.3V |
| Number of Elements | 2 |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 3.6V |
| Load Capacitance | 50pF |
| Number of Ports | 2 |
| Output Current | 12mA |
| Number of Bits | 16 |
| Clock Frequency | 160MHz |
| Propagation Delay | 6.9 ns |
| Turn On Delay Time | 3.4 ns |
| Family | LVT |
| Logic Function | D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 190μA |
| Output Characteristics | 3-STATE WITH SERIES RESISTOR |
| Current - Output High, Low | 12mA 12mA |
| Max Propagation Delay @ V, Max CL | 5.3ns @ 3.3V, 50pF |
| Prop. Delay@Nom-Sup | 5.3 ns |
| Trigger Type | Positive Edge |
| Input Capacitance | 3pF |
| Power Supply Current-Max (ICC) | 5mA |
| Number of Output Lines | 8 |
| Count Direction | UNIDIRECTIONAL |
| Clock Edge Trigger Type | Positive Edge |
| Translation | N/A |
| Height | 2.79mm |
| Length | 15.88mm |
| Width | 7.49mm |
| Thickness | 2.59mm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
SN74LVTH162374DLR Overview
The flip flop is packaged in 48-BSSOP (0.295, 7.50mm Width). D flip flop is embedded in the Cut Tape (CT) package. Tri-State, Non-Invertedis the output configured for it. In the configuration of the trigger, Positive Edgeis used. This electronic part is mounted in the way of Surface Mount. It operates with a supply voltage of 2.7V~3.6V. A temperature of -40°C~85°C TAis used in the operation. A flip flop of this type is classified as a D-Type. In terms of FPGAs, it belongs to the 74LVTH series. You should not exceed 160MHzin its output frequency. In total, it contains 2 elements. There is a consumption of 190μAof quiescent energy. 48terminations have occurred. This D latch belongs to the family of 74LVTH162374. The D flip flop is powered by a voltage of 3.3V . The input capacitance of this T flip flop is 3pF farads, which is defined as the capacitance between the input terminals of an op amp with either input grounded. In this case, the D flip flop belongs to the LVTfamily. The electronic part is mounted in the way of Surface Mount. The 48pins are designed into the board. This device exhibits a clock edge trigger type of Positive Edge. There is a base part number FF/Latchesfor the RS flip flops. The flip flop is designed with 16bits. It reaches the maximum supply voltage (Vsup) at 3.6V. As a result of its reliability, this D flip flop is ideally suited for TR. The D flip flop has no ports embedded. The supply voltage should be maintained at 3.3V for high efficiency. Its output current of 12mAallows for maximum design flexibility. It is designed with 8 output lines.
SN74LVTH162374DLR Features
Cut Tape (CT) package
74LVTH series
48 pins
16 Bits
SN74LVTH162374DLR Applications
There are a lot of Texas Instruments SN74LVTH162374DLR Flip Flops applications.
- Memory
- Shift registers
- Cold spare funcion
- High Performance Logic for test systems
- Instrumentation
- Clock pulse
- Matched Rise and Fall
- Test & Measurement
- Consumer
- Latch
