Parameters |
Factory Lead Time |
1 Week |
Mount |
Surface Mount |
Package / Case |
TFBGA |
Number of Pins |
68 |
Published |
2003 |
JESD-609 Code |
e1 |
Pbfree Code |
yes |
Number of Terminations |
68 |
ECCN Code |
EAR99 |
Terminal Finish |
TIN SILVER COPPER |
Max Operating Temperature |
85°C |
Min Operating Temperature |
0°C |
Additional Feature |
YES |
Subcategory |
Programmable Logic Devices |
Technology |
CMOS |
Terminal Position |
BOTTOM |
Terminal Form |
BALL |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
1.8V |
Frequency |
1.4749GHz |
Time@Peak Reflow Temperature-Max (s) |
40 |
Pin Count |
68 |
Operating Supply Voltage |
1.8V |
Temperature Grade |
OTHER |
Max Supply Voltage |
1.89V |
Min Supply Voltage |
1.71V |
Memory Size |
1kB |
Operating Supply Current |
25μA |
Number of I/O |
52 |
Nominal Supply Current |
25μA |
Memory Type |
FLASH |
Propagation Delay |
14 ns |
Frequency (Max) |
152MHz |
Number of Logic Elements/Cells |
240 |
Number of Programmable I/O |
52 |
Number of Logic Blocks (LABs) |
8 |
Speed Grade |
5 |
Output Function |
MACROCELL |
Number of Macro Cells |
192 |
JTAG BST |
YES |
In-System Programmable |
YES |
Height Seated (Max) |
1.2mm |
Radiation Hardening |
No |
RoHS Status |
RoHS Compliant |
5M240ZM68C5N Overview
There are 192 macro cells, which are cells in a mobile phone network that provides radio coverage served by a high-power cell site (tower, antenna or mast).The product is contained in a TFBGA package.There are 52 I/Os programmed in it.There are 68 terminations programmed into the device.This electrical component has a terminal position of 0.Power is supplied by a voltage of 1.8V volts.It is a part of the family [0].68pins are programmed on the chip.It is also possible to find YESwhen using this device.A high level of efficiency can be achieved by maintaining the supply voltage at [0].For data storage, FLASHis adopted.This electronic part is mounted in the way of Surface Mount.This board has 68 pins.There is a maximum supply voltage of 1.89V.The minimal supply voltage is 1.71V.A total of 52programmable I/Os are available.There is 1.4749GHz frequency that can be achieved.It is recommended that the operating temperature exceed 0°C.Temperatures should be lower than 85°C when operating.8logic blocks (LABs) make up this circuit.As a fundamental building block, there are 240 logic elements/cells.It is recommended that the maximal frequency be lower than 152MHz.In the devices, a memory of 1kBis provided for the storage of programs and data.
5M240ZM68C5N Features
TFBGA package
52 I/Os
68 pin count
68 pins
8 logic blocks (LABs)
5M240ZM68C5N Applications
There are a lot of Altera 5M240ZM68C5N CPLDs applications.
- Cross-Matrix Switch
- Multiple Clock Source Selection
- Digital designs
- TIMERS/COUNTERS
- Auxiliary Power Supply Isolated and Non-isolated
- Custom shift registers
- Multiple DIP Switch Replacement
- DDC INTERFACE
- State machine control
- Address decoders