74ACT11374DW
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 1 day ago) |
| Contact Plating | Gold |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 24-SOIC (0.295, 7.50mm Width) |
| Number of Pins | 24 |
| Weight | 624.398247mg |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tube |
| Series | 74ACT |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 24 |
| ECCN Code | EAR99 |
| Type | D-Type |
| Subcategory | FF/Latches |
| Technology | CMOS |
| Voltage - Supply | 4.5V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 5V |
| Base Part Number | 74ACT11374 |
| Function | Standard |
| Output Type | Tri-State, Non-Inverted |
| Operating Supply Voltage | 5V |
| Number of Elements | 1 |
| Polarity | Non-Inverting |
| Power Supplies | 5V |
| Number of Circuits | 8 |
| Load Capacitance | 50pF |
| Number of Ports | 2 |
| Output Current | 24mA |
| Number of Bits | 8 |
| Clock Frequency | 70MHz |
| Propagation Delay | 13 ns |
| Quiescent Current | 8μA |
| Turn On Delay Time | 8.5 ns |
| Family | ACT |
| Logic Function | D-Type, Flip-Flop |
| Current - Output High, Low | 24mA 24mA |
| Max Propagation Delay @ V, Max CL | 11.3ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 4pF |
| Number of Output Lines | 3 |
| Count Direction | UNIDIRECTIONAL |
| Clock Edge Trigger Type | Positive Edge |
| Translation | N/A |
| Max Frequency@Nom-Sup | 55000000Hz |
| Height | 2.65mm |
| Length | 15.4mm |
| Width | 7.5mm |
| Thickness | 2.35mm |
| Radiation Hardening | No |
| REACH SVHC | No SVHC |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
74ACT11374DW Overview
The flip flop is packaged in 24-SOIC (0.295, 7.50mm Width). Package Tubeembeds it. In the configuration, Tri-State, Non-Invertedis used as the output. There is a trigger configured with Positive Edge. It is mounted in the way of Surface Mount. A supply voltage of 4.5V~5.5V is required for operation. Temperature is set to -40°C~85°C TA. This electronic flip flop is of type D-Type. JK flip flop is a part of the 74ACTseries of FPGAs. In order for it to function properly, its output frequency should not exceed 70MHz. D latch consists of 1 elements. 24terminations have occurred. JK flip flop belongs to 74ACT11374 family. A voltage of 5V is used as the power supply for this D latch. A JK flip flop with a 4pFfarad input capacitance is used here. In this case, the D flip flop belongs to the ACTfamily. It is mounted in the way of Surface Mount. The 24pins are designed into the board. This device has the clock edge trigger type of Positive Edge. This device has the base part number FF/Latches. The flip flop is designed with 8bits. The superior flexibility of this product is achieved by using 8 circuits. A power supply of 5Vis required to operate it. The flip flop contains 2ports. If high efficiency is desired, the supply voltage should be kept at 5V. With a current output of 24mA , it offers maximum design flexibility. There are 3 output lines on it. It consumes 8μA current.
74ACT11374DW Features
Tube package
74ACT series
24 pins
8 Bits
5V power supplies
74ACT11374DW Applications
There are a lot of Texas Instruments 74ACT11374DW Flip Flops applications.
- Counters
- ESD protection
- Computing
- Modulo – n – counter
- Convert a momentary switch to a toggle switch
- Frequency Dividers
- EMI reduction circuitry
- Matched Rise and Fall
- Test & Measurement
- Single Up Count-Control Line
