74ACTQ273SC
| Parameters | |
|---|---|
| Packaging | Tube |
| Series | 74ACTQ |
| JESD-609 Code | e3 |
| Pbfree Code | yes |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 20 |
| Type | D-Type |
| Terminal Finish | MATTE TIN |
| Technology | CMOS |
| Voltage - Supply | 4.5V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 5V |
| Reach Compliance Code | unknown |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| JESD-30 Code | R-PDSO-G20 |
| Function | Master Reset |
| Qualification Status | Not Qualified |
| Output Type | Non-Inverted |
| Number of Elements | 1 |
| Supply Voltage-Max (Vsup) | 5.5V |
| Supply Voltage-Min (Vsup) | 4.5V |
| Clock Frequency | 189MHz |
| Family | ACT |
| Current - Quiescent (Iq) | 40μA |
| Current - Output High, Low | 24mA 24mA |
| Output Polarity | TRUE |
| Number of Bits per Element | 8 |
| Max Propagation Delay @ V, Max CL | 8.5ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 4.5pF |
| Propagation Delay (tpd) | 9 ns |
| Height Seated (Max) | 2.65mm |
| Width | 7.5mm |
| RoHS Status | ROHS3 Compliant |
| Mounting Type | Surface Mount |
| Package / Case | 20-SOIC (0.295, 7.50mm Width) |
| Surface Mount | YES |
| Operating Temperature | -40°C~85°C TA |
74ACTQ273SC Overview
20-SOIC (0.295, 7.50mm Width)is the packaging method. D flip flop is included in the Tubepackage. There is a Non-Invertedoutput configured with it. This trigger uses the value Positive Edge. There is an electrical part that is mounted in the way of Surface Mount. The JK flip flop operates at 4.5V~5.5Vvolts. -40°C~85°C TAis the operating temperature. The type of this D latch is D-Type. The 74ACTQseries comprises this type of FPGA. It should not exceed 189MHzin its output frequency. D latch consists of 1 elements. T flip flop consumes 40μA quiescent energy. It has been determined that there have been 20 terminations. A voltage of 5V is used to power it. Its input capacitance is 4.5pFfarads. ACTis the family of this D flip flop. In this case, the maximum supply voltage (Vsup) reaches 5.5V. If you want to maintain normal operation, you should keep the supply voltage (Vsup) above 4.5V.
74ACTQ273SC Features
Tube package
74ACTQ series
74ACTQ273SC Applications
There are a lot of Rochester Electronics, LLC 74ACTQ273SC Flip Flops applications.
- ESD protection
- Count Modes
- CMOS Process
- Safety Clamp
- Automotive
- Individual Asynchronous Resets
- Bus hold
- Data storage
- Control circuits
- Matched Rise and Fall
