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74FCT374ATQG

4.5V~5.5V D-Type Flip Flop 74FCT374 1mA 74FCT Series 20-SSOP (0.154, 3.90mm Width)


  • Manufacturer: Renesas Electronics America Inc.
  • Nocochips NO: 668-74FCT374ATQG
  • Package: 20-SSOP (0.154, 3.90mm Width)
  • Datasheet: PDF
  • Stock: 644
  • Description: 4.5V~5.5V D-Type Flip Flop 74FCT374 1mA 74FCT Series 20-SSOP (0.154, 3.90mm Width)(Kg)

Details

Tags

Parameters
Factory Lead Time 1 Week
Mounting Type Surface Mount
Package / Case 20-SSOP (0.154, 3.90mm Width)
Supplier Device Package 20-QSOP
Operating Temperature -40°C~85°C TA
Packaging Tube
Series 74FCT
Part Status Active
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Type D-Type
Voltage - Supply 4.5V~5.5V
Base Part Number 74FCT374
Function Standard
Output Type Tri-State, Non-Inverted
Number of Elements 1
Current - Quiescent (Iq) 1mA
Current - Output High, Low 15mA 48mA
Number of Bits per Element 8
Max Propagation Delay @ V, Max CL 6.5ns @ 5V, 50pF
Trigger Type Positive Edge
Input Capacitance 6pF
RoHS Status ROHS3 Compliant

74FCT374ATQG Overview


In the form of 20-SSOP (0.154, 3.90mm Width), it has been packaged. Package Tubeembeds it. As configured, the output uses Tri-State, Non-Inverted. In the configuration of the trigger, Positive Edgeis used. This electronic part is mounted in the way of Surface Mount. The supply voltage is set to 4.5V~5.5V. It is at -40°C~85°C TAdegrees Celsius that the system is operating. This D latch has the type D-Type. This type of FPGA is a part of the 74FCT series. D latch consists of 1 elements. As a result, it consumes 1mA quiescent current and is not affected by external forces. It is a member of the 74FCT374 family. There is 6pF input capacitance for this T flip flop.

74FCT374ATQG Features


Tube package
74FCT series

74FCT374ATQG Applications


There are a lot of Renesas Electronics America Inc. 74FCT374ATQG Flip Flops applications.

  • Control circuits
  • Buffer registers
  • Event Detectors
  • Data transfer
  • Memory
  • Set-reset capability
  • Instrumentation
  • Data Synchronizers
  • Single Up Count-Control Line
  • Balanced Propagation Delays

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