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74LCX373SJ

D-Type, Latch 2V~3.6V 8 Bits Tri-State Latches 74LCX Series 74LCX373 20-SOIC (0.209, 5.30mm Width)


  • Manufacturer: ON Semiconductor
  • Nocochips NO: 598-74LCX373SJ
  • Package: 20-SOIC (0.209, 5.30mm Width)
  • Datasheet: PDF
  • Stock: 449
  • Description: D-Type, Latch 2V~3.6V 8 Bits Tri-State Latches 74LCX Series 74LCX373 20-SOIC (0.209, 5.30mm Width)(Kg)

Details

Tags

Parameters
Mount Surface Mount
Mounting Type Surface Mount
Package / Case 20-SOIC (0.209, 5.30mm Width)
Number of Pins 20
Weight 481.5mg
Operating Temperature -40°C~85°C
Packaging Tube
Series 74LCX
Part Status Obsolete
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Voltage - Supply 2V~3.6V
Base Part Number 74LCX373
Output Type Tri-State
Circuit 8:8
Polarity Non-Inverting
Number of Bits 8
Propagation Delay 8 ns
Turn On Delay Time 1.5 ns
Logic Function D-Type, Latch
Current - Output High, Low 24mA 24mA
Logic Type D-Type Transparent Latch
Number of Input Lines 2
Independent Circuits 1
Number of Output Lines 3
Radiation Hardening No
RoHS Status RoHS Compliant
Lead Free Lead Free

74LCX373SJ Overview


20-SOIC (0.209, 5.30mm Width) contains it. Tube is the packaging method. Tri-State is the output configured for it. The Logic type of this electrical device is D-Type Transparent Latch. Surface Mount is used to mount this electronic part. A voltage of 2V~3.6V is used as the supply voltage for this device. It is -40°C~85°C at the operating temperature. It is a type of FPGA belonging to the 74LCX series. An electronic part with 8 bits is designed. It is a member of the 74LCX373 family. It is designed with 20 pins. Electronic parts are mounted using the Surface Mount method. An electronic circuit can be found on 2 input lines. There are 3 output lines that correspond to the binary equivalents of the input line.

74LCX373SJ Features


20-SOIC (0.209, 5.30mm Width) package
74LCX series
8 Bits
74LCX373 family
20 pins

74LCX373SJ Applications


There are a lot of ON Semiconductor 74LCX373SJ Latches applications.

  • Display driver
  • Counters
  • Communication systems
  • Parallel Input
  • Data acquisition
  • Buffer register
  • Pattern Generators
  • Shift right register
  • Hammer Device Information
  • Sample and hold register

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