Parameters |
Mounting Type |
Surface Mount |
Package / Case |
20-SOIC (0.295, 7.50mm Width) |
Supplier Device Package |
20-SO |
Operating Temperature |
-40°C~125°C TA |
Packaging |
Tube |
Series |
74LV |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Type |
D-Type |
Voltage - Supply |
1V~5.5V |
Function |
Master Reset |
Output Type |
Non-Inverted |
Number of Elements |
1 |
Clock Frequency |
100MHz |
Current - Quiescent (Iq) |
160μA |
Current - Output High, Low |
12mA 12mA |
Number of Bits per Element |
8 |
Max Propagation Delay @ V, Max CL |
19ns @ 5V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
3.5pF |
RoHS Status |
ROHS3 Compliant |
74LV273D,112 Overview
In the form of 20-SOIC (0.295, 7.50mm Width), it has been packaged. It is contained within the Tubepackage. The output it is configured with uses Non-Inverted. This trigger uses the value Positive Edge. Surface Mountis occupied by this electronic component. The JK flip flop operates at a voltage of 1V~5.5V. The operating temperature is -40°C~125°C TA. This electronic flip flop is of type D-Type. In this case, it is a type of FPGA belonging to the 74LV series. It should not exceed 100MHzin its output frequency. D latch consists of 1 elements. Despite external influences, it consumes 160μAof quiescent current. This JK flip flop has a 3.5pFfarad input capacitance.
74LV273D,112 Features
Tube package
74LV series
74LV273D,112 Applications
There are a lot of Rochester Electronics, LLC 74LV273D,112 Flip Flops applications.
- Individual Asynchronous Resets
- Memory
- Functionally equivalent to the MC10/100EL29
- Computers
- Bus hold
- Storage registers
- Set-reset capability
- Shift registers
- Guaranteed simultaneous switching noise level
- Communications