74LVC1G80GM,132
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Contact Plating | Tin |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 6-XFDFN |
| Number of Pins | 6 |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tape & Reel (TR) |
| Published | 2010 |
| Series | 74LVC |
| JESD-609 Code | e3 |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 6 |
| Type | D-Type |
| Technology | CMOS |
| Voltage - Supply | 1.65V~5.5V |
| Terminal Position | DUAL |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 1.8V |
| Terminal Pitch | 0.5mm |
| Time@Peak Reflow Temperature-Max (s) | 40 |
| Base Part Number | 74LVC1G80 |
| Function | Standard |
| Output Type | Inverted |
| Polarity | Inverting |
| Supply Voltage-Max (Vsup) | 5.5V |
| Number of Bits | 1 |
| Clock Frequency | 400MHz |
| Propagation Delay | 2.5 ns |
| Quiescent Current | 100nA |
| Turn On Delay Time | 1.8 ns |
| Family | LVC/LCX/Z |
| Current - Quiescent (Iq) | 200μA |
| Current - Output High, Low | 32mA 32mA |
| Max Propagation Delay @ V, Max CL | 4.5ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 5pF |
| Number of Input Lines | 1 |
| fmax-Min | 200 MHz |
| Clock Edge Trigger Type | Positive Edge |
| Height Seated (Max) | 0.5mm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
74LVC1G80GM,132 Overview
It is embeded in 6-XFDFN case. It is included in the package Tape & Reel (TR). The output it is configured with uses Inverted. This trigger is configured to use Positive Edge. There is an electric part mounted in the way of Surface Mount. A supply voltage of 1.65V~5.5V is required for operation. It is operating at -40°C~125°C TA. This D latch has the type D-Type. In terms of FPGAs, it belongs to the 74LVC series. A frequency of 400MHzshould be the maximum output frequency. T flip flop consumes 200μA quiescent energy. A total of 6terminations have been recorded. The 74LVC1G80 family contains this object. A voltage of 1.8V is used as the power supply for this D latch. There is 5pF input capacitance for this T flip flop. This D flip flop belongs to the family of LVC/LCX/Z. It is mounted by the way of Surface Mount. With its 6pins, it is designed to work with most electronic flip flops. It has a clock edge trigger type of Positive Edge. An electronic part with 1bits has been designed. In this case, the maximum supply voltage (Vsup) reaches 5.5V. As of now, there are 1input lines. This D latch consumes 100nA quiescent current at all.
74LVC1G80GM,132 Features
Tape & Reel (TR) package
74LVC series
6 pins
1 Bits
74LVC1G80GM,132 Applications
There are a lot of Nexperia USA Inc. 74LVC1G80GM,132 Flip Flops applications.
- Synchronous counter
- Frequency Divider circuits
- Single Up Count-Control Line
- Differential Individual
- Control circuits
- Data storage
- ESD protection
- Shift Registers
- Buffered Clock
- Circuit Design
