Parameters |
Factory Lead Time |
1 Week |
Contact Plating |
Gold |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
20-SOIC (0.295, 7.50mm Width) |
Number of Pins |
20 |
Operating Temperature |
-40°C~125°C TA |
Packaging |
Tape & Reel (TR) |
Series |
74LVC |
JESD-609 Code |
e4 |
Part Status |
Active |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
20 |
Type |
D-Type |
Additional Feature |
BROADSIDE VERSION OF 374 |
Technology |
CMOS |
Voltage - Supply |
1.65V~3.6V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
2.7V |
Time@Peak Reflow Temperature-Max (s) |
30 |
Base Part Number |
74LVC574 |
Function |
Standard |
Output Type |
Tri-State, Non-Inverted |
Number of Elements |
1 |
Polarity |
Non-Inverting |
Supply Voltage-Max (Vsup) |
3.6V |
Number of Ports |
2 |
Number of Bits |
8 |
Clock Frequency |
200MHz |
Propagation Delay |
3.2 ns |
Quiescent Current |
100nA |
Turn On Delay Time |
9 ns |
Family |
LVC/LCX/Z |
Logic Function |
D-Type, Flip-Flop |
Current - Quiescent (Iq) |
10μA |
Output Characteristics |
3-STATE |
Current - Output High, Low |
24mA 24mA |
Max Propagation Delay @ V, Max CL |
7ns @ 3.3V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
5pF |
Number of Input Lines |
8 |
Clock Edge Trigger Type |
Positive Edge |
Height Seated (Max) |
2.65mm |
Width |
7.5mm |
Radiation Hardening |
No |
RoHS Status |
ROHS3 Compliant |
Lead Free |
Lead Free |
74LVC574AD,118 Overview
20-SOIC (0.295, 7.50mm Width)is the way it is packaged. D flip flop is included in the Tape & Reel (TR)package. T flip flop uses Tri-State, Non-Invertedas the output. In the configuration of the trigger, Positive Edgeis used. Surface Mountmounts this electrical part. The JK flip flop operates at 1.65V~3.6Vvolts. A temperature of -40°C~125°C TAis considered to be the operating temperature. A flip flop of this type is classified as a D-Type. The 74LVCseries comprises this type of FPGA. In order for it to function properly, its output frequency should not exceed 200MHz. D latch consists of 1 elements. It consumes 10μA of quiescent current without being affected by external factors. There are 20 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line. If you search by 74LVC574, you will find similar parts. Power is provided by a 2.7V supply. Its input capacitance is 5pF farads. Electronic devices of this type belong to the LVC/LCX/Zfamily. There is an electronic part mounted in the way of Surface Mount. A total of 20pins are provided on this board. There is a clock edge trigger type of Positive Edgeon this device. The design is based on 8bits. It reaches the maximum supply voltage (Vsup) at 3.6V. The flip flop has 2ports embedded within it. It is reported that there are 8 input lines. It consumes a total of 100nA quiescent current at any given time. Additionally, it is characterized by BROADSIDE VERSION OF 374.
74LVC574AD,118 Features
Tape & Reel (TR) package
74LVC series
20 pins
8 Bits
74LVC574AD,118 Applications
There are a lot of Nexperia USA Inc. 74LVC574AD,118 Flip Flops applications.
- Circuit Design
- Computing
- Individual Asynchronous Resets
- Bounce elimination switch
- Test & Measurement
- Memory
- Matched Rise and Fall
- Count Modes
- Cold spare funcion
- Data Synchronizers