CD4076BNSR
| Parameters | |
|---|---|
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 16-SOIC (0.209, 5.30mm Width) |
| Number of Pins | 16 |
| Operating Temperature | -55°C~125°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 4000B |
| Pbfree Code | yes |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 16 |
| Type | D-Type |
| Subcategory | FF/Latches |
| Packing Method | TAPE AND REEL |
| Technology | CMOS |
| Voltage - Supply | 3V~18V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | NOT SPECIFIED |
| Supply Voltage | 5V |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | CD4076 |
| Function | Reset |
| Qualification Status | Not Qualified |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 1 |
| Polarity | Non-Inverting |
| Supply Voltage-Min (Vsup) | 3V |
| Load Capacitance | 50pF |
| Output Current | 6.8mA |
| Number of Bits | 4 |
| Clock Frequency | 16MHz |
| Propagation Delay | 600 ns |
| Turn On Delay Time | 60 ns |
| Current - Quiescent (Iq) | 20μA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 6.8mA 6.8mA |
| Max Propagation Delay @ V, Max CL | 180ns @ 15V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 5pF |
| Number of Input Lines | 4 |
| fmax-Min | 8 MHz |
| Clock Edge Trigger Type | Positive Edge |
| Max Frequency@Nom-Sup | 3000000Hz |
| Height Seated (Max) | 2mm |
| Width | 5.3mm |
| RoHS Status | ROHS3 Compliant |
CD4076BNSR Overview
16-SOIC (0.209, 5.30mm Width)is the packaging method. It is included in the package Tape & Reel (TR). Currently, the output is configured to use Tri-State, Non-Inverted. JK flip flop uses Positive Edgeas the trigger. The electronic part is mounted in the way of Surface Mount. Powered by a 3V~18Vvolt supply, it operates as follows. A temperature of -55°C~125°C TAis used in the operation. Logic flip flops of this type are classified as D-Type. The 4000Bseries comprises this type of FPGA. There should be no greater frequency than 16MHzon its output. D latch consists of 1 elements. It consumes 20μA of quiescent In 16terminations, a transmission line is terminated with a JK flip flop that matches its characteristic impedance. JK flip flop belongs to CD4076 family. The power source is powered by 5V. Its input capacitance is 5pF farads. There is an electronic part mounted in the way of Surface Mount. A total of 16pins are provided on this board. This device exhibits a clock edge trigger type of Positive Edge. The part you are looking for is included in FF/Latches. An electronic part designed with 4bits is used in this application. A normal operating voltage (Vsup) should remain above 3V. In view of its reliability, this D flip flop is a good fit for TAPE AND REEL. It offers maximum design flexibility with its output current of 6.8mA. Currently, there are 4 input lines present.
CD4076BNSR Features
Tape & Reel (TR) package
4000B series
16 pins
4 Bits
CD4076BNSR Applications
There are a lot of Texas Instruments CD4076BNSR Flip Flops applications.
- ESD performance
- ATE
- Differential Individual
- Cold spare funcion
- Reduced system switching noise
- Matched Rise and Fall
- Circuit Design
- ESD protection
- Data transfer
- Instrumentation
