Parameters |
Operating Temperature |
0°C~70°C |
Packaging |
Tube |
Published |
1999 |
JESD-609 Code |
e4 |
Pbfree Code |
yes |
Part Status |
Active |
Moisture Sensitivity Level (MSL) |
3 (168 Hours) |
Number of Terminations |
16 |
Type |
Fanout Buffer (Distribution), Zero Delay Buffer |
Terminal Finish |
Nickel/Palladium/Gold (Ni/Pd/Au) |
Subcategory |
Clock Drivers |
Voltage - Supply |
3V~3.6V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Number of Functions |
1 |
Supply Voltage |
3.3V |
Time@Peak Reflow Temperature-Max (s) |
30 |
Base Part Number |
CY23S09 |
Output |
LVCMOS |
Pin Count |
16 |
Number of Outputs |
9 |
Operating Supply Voltage |
3.3V |
Supply Voltage-Max (Vsup) |
3.6V |
Supply Voltage-Min (Vsup) |
3V |
Number of Circuits |
1 |
Nominal Supply Current |
32mA |
Frequency (Max) |
133.33MHz |
Family |
23S |
Input |
LVCMOS, LVTTL |
Ratio - Input:Output |
1:9 |
PLL |
Yes with Bypass |
Differential - Input:Output |
No/No |
Propagation Delay (tpd) |
0.35 ns |
Same Edge Skew-Max (tskwd) |
0.25 ns |
Height |
1.48mm |
Length |
9.98mm |
Width |
3.98mm |
Radiation Hardening |
No |
RoHS Status |
ROHS3 Compliant |
Lead Free |
Lead Free |
Factory Lead Time |
1 Week |
Contact Plating |
Gold, Tin |
Mounting Type |
Surface Mount |
Package / Case |
16-SOIC (0.154, 3.90mm Width) |
Surface Mount |
YES |
Number of Pins |
16 |
CY23S09SXC-1H Overview
A clock integrated circuit is packaged in a Tube-shaped package because it is for use as a clock. The 16-SOIC (0.154, 3.90mm Width) package embeds this Clock PLL. This clock generator will sustain a maximum temperature of 260 when reflown. It contains a total of 16 terminations within RF synthesizer. The clock generator ic should be grounded with a voltage of 3.3V. There is a Clock PLL called LVCMOS, LVTTL which is designed to be the input to this clock generator. For full access to the electronic component's capabilities, 1 circuits are implemented. It provides a maximum frequency of 133.33MHz. PLL clock is mounted in the way of Surface Mount. The maximum voltage this clock PLL can handle is 3.6V. It is safe to use this frequency synthesizer with a supply voltage above 3V. As far as the supply voltage is concerned, clock PLL can be used with 3V~3.6V. Using the test statistics, it is estimated that the ambient temperature should be set to 0°C~70°C. A frequency synthesizer which is compatible with the LVCMOS logic levels is presented here. As far as electrical parts go, this component can be classified as a Fanout Buffer (Distribution), Zero Delay Buffer component. Clock PLL is equipped with 16 pin count. The related electrical components for the base part number CY23S09 can be found below. A 16 pin is available on the clock PLL. There is a maximum supply voltage of 3.3V that this analog clock generator can handle. Clock Drivers-type frequency generators are usually classified as this type. Clock PLL is configured with 9 output. Low timing skew is provided by this analog clock generator at maximum 0.25 ns. When searching for parts of the 23S family, similar frequency generators will be found.
CY23S09SXC-1H Features
Available in the 16-SOIC (0.154, 3.90mm Width)
Supply voltage of 3.3V
Operating supply voltage of 3.3V
CY23S09SXC-1H Applications
There are a lot of Cypress Semiconductor Corp CY23S09SXC-1H Clock Generators applications.
- Multiplexing communication
- Modems
- Myriad digital applications
- Medical equipment
- Bluetooth receivers
- Radiotelephones
- Bit synchronization
- Digital circuits
- Symbol synchronization
- Cellular/4G