EPM3128AFC256-7N
| Parameters | |
|---|---|
| Frequency (Max) | 192.3MHz |
| Programmable Logic Type | EE PLD |
| Number of Gates | 2500 |
| Number of Programmable I/O | 98 |
| Number of Logic Blocks (LABs) | 8 |
| Speed Grade | 7 |
| Output Function | MACROCELL |
| Number of Macro Cells | 128 |
| JTAG BST | YES |
| In-System Programmable | YES |
| Height Seated (Max) | 3.5mm |
| RoHS Status | RoHS Compliant |
| Factory Lead Time | 1 Week |
| Mount | Surface Mount |
| Package / Case | FBGA |
| Number of Pins | 256 |
| Published | 1998 |
| JESD-609 Code | e1 |
| Pbfree Code | yes |
| Moisture Sensitivity Level (MSL) | 3 |
| Number of Terminations | 256 |
| ECCN Code | EAR99 |
| Terminal Finish | Tin/Silver/Copper (Sn/Ag/Cu) |
| Max Operating Temperature | 70°C |
| Min Operating Temperature | 0°C |
| Additional Feature | YES |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | BOTTOM |
| Terminal Form | BALL |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 3.3V |
| Terminal Pitch | 1mm |
| Reach Compliance Code | unknown |
| Frequency | 166.67MHz |
| Time@Peak Reflow Temperature-Max (s) | 40 |
| Pin Count | 256 |
| Qualification Status | Not Qualified |
| Operating Supply Voltage | 3.3V |
| Temperature Grade | COMMERCIAL |
| Max Supply Voltage | 3.6V |
| Min Supply Voltage | 3V |
| Number of I/O | 98 |
| Memory Type | EEPROM |
| Propagation Delay | 7.5 ns |
| Turn On Delay Time | 7.5 ns |
EPM3128AFC256-7N Overview
In the mobile phone network, there are 128macro cells, which are cells with high-power antennas and towers.It is embedded in the FBGA package.In this case, there are 98 I/Os programmed.The termination of a device is set to [0].The terminal position of this electrical component is BOTTOM.There is 3.3V voltage supply for this device.There is a part included in Programmable Logic Devices.The chip is programmed with 256 pins.When using this device, YEScan also be found.In digital circuits, 2500gates serve as building blocks.In order to achieve high efficiency, the supply voltage should be maintained at [0].It is recommended that data be stored in [0].Surface Mountis used to mount this electronic component.A total of 256pins are provided on this board.There is a maximum supply voltage of 3.6V.Despite its minimal supply voltage of [0], it is capable of operating.A total of 98 Programmable I/Os are available.There is a maximum frequency of 166.67MHz.The operating temperature should be higher than 0°C.A temperature below 70°Cshould be used as the operating temperature.In total, it contains 8 logic blocks (LABs).The maximal frequency should be lower than 192.3MHz.A programmable logic type is classified as EE PLD.
EPM3128AFC256-7N Features
FBGA package
98 I/Os
256 pin count
256 pins
8 logic blocks (LABs)
EPM3128AFC256-7N Applications
There are a lot of Altera EPM3128AFC256-7N CPLDs applications.
- Preset swapping
- Software Configuration of Add-In Boards
- DDC INTERFACE
- Handheld digital devices
- Portable digital devices
- Power Meter SMPS
- Timing control
- Storage Cards and Storage Racks
- Custom shift registers
- Digital designs
