Parameters |
Factory Lead Time |
1 Week |
Mount |
Surface Mount |
Package / Case |
FBGA |
Number of Pins |
100 |
Published |
1998 |
JESD-609 Code |
e0 |
Pbfree Code |
no |
Moisture Sensitivity Level (MSL) |
3 |
Number of Terminations |
100 |
ECCN Code |
3A991 |
Max Operating Temperature |
85°C |
Min Operating Temperature |
-40°C |
Subcategory |
Programmable Logic Devices |
Technology |
CMOS |
Terminal Position |
BOTTOM |
Terminal Form |
BALL |
Peak Reflow Temperature (Cel) |
235 |
Supply Voltage |
3.3V |
Terminal Pitch |
1mm |
Frequency |
166.67MHz |
Time@Peak Reflow Temperature-Max (s) |
30 |
Pin Count |
100 |
Number of Outputs |
84 |
Operating Supply Voltage |
3.3V |
Temperature Grade |
INDUSTRIAL |
Max Supply Voltage |
3.6V |
Min Supply Voltage |
3V |
Number of I/O |
84 |
Memory Type |
EEPROM |
Propagation Delay |
7.5 ns |
Turn On Delay Time |
7.5 ns |
Frequency (Max) |
192.3MHz |
Architecture |
PAL-TYPE |
Programmable Logic Type |
EE PLD |
Number of Gates |
2500 |
Number of Programmable I/O |
84 |
Number of Logic Blocks (LABs) |
8 |
Speed Grade |
7 |
Output Function |
MACROCELL |
Number of Macro Cells |
128 |
JTAG BST |
YES |
In-System Programmable |
YES |
Length |
11mm |
Width |
11mm |
Radiation Hardening |
No |
RoHS Status |
RoHS Compliant |
Lead Free |
Contains Lead |
EPM7128AEFI100-7 Overview
The mobile phone network has 128 macro cells, which are cells that provide radio coverage from high-power cell sites (towers, antennas, or masts).It is embedded in the FBGA package.The device is programmed with 84 I/O ports.There are 100 terminations programmed into the device.The terminal position of this electrical part is BOTTOM, which serves as an important access point for passengers or freight.A voltage of 3.3Vprovides power to the device.There is a part in the family [0].It is equipped with 100 pin count.In digital circuits, 2500gates serve as building blocks.High efficiency requires the supply voltage to be maintained at [0].Data is stored using [0].A Surface Mountis mounted on this electronic component.There are 100 pins on the device.It operates with the maximal supply voltage of 3.6V.The device is designed to operate with a minimal supply voltage of 3VV.There are 84 programmable I/Os in this system.In this case, 166.67MHzis the frequency that can be achieved.It is recommended that the operating temperature be greater than -40°C.A temperature lower than 85°Cis recommended for operation.It is composed of 8 logic blocks (LABs).It is recommended that the maximum frequency is less than 0.This kind of FPGA is composed of EE PLD.This device has 84outputs configured.
EPM7128AEFI100-7 Features
FBGA package
84 I/Os
100 pin count
100 pins
8 logic blocks (LABs)
84 outputs
EPM7128AEFI100-7 Applications
There are a lot of Altera EPM7128AEFI100-7 CPLDs applications.
- Boolean function generators
- I2C BUS INTERFACE
- ANALOG-TO-DIGITAL CONVERTOR (ADC)
- STANDARD SERIAL INTERFACE UART
- Power automation
- Parity generators
- Random logic replacement
- Software-Driven Hardware Configuration
- D/T registers and latches
- DDC INTERFACE