EPM7128SLI84-10N
| Parameters | |
|---|---|
| Mount | Surface Mount |
| Package / Case | PLCC |
| Number of Pins | 84 |
| Published | 1998 |
| JESD-609 Code | e3 |
| Pbfree Code | yes |
| Moisture Sensitivity Level (MSL) | 3 |
| Number of Terminations | 84 |
| ECCN Code | EAR99 |
| Max Operating Temperature | 85°C |
| Min Operating Temperature | -40°C |
| Additional Feature | CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | QUAD |
| Terminal Form | J BEND |
| Peak Reflow Temperature (Cel) | NOT SPECIFIED |
| Supply Voltage | 5V |
| Terminal Pitch | 1.27mm |
| Frequency | 147.1MHz |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Pin Count | 84 |
| Qualification Status | Not Qualified |
| Power Supplies | 3.3/55V |
| Temperature Grade | INDUSTRIAL |
| Max Supply Voltage | 3.6V |
| Min Supply Voltage | 3V |
| Number of I/O | 68 |
| Memory Type | EEPROM |
| Propagation Delay | 10 ns |
| Turn On Delay Time | 10 ns |
| Frequency (Max) | 147.1MHz |
| Programmable Logic Type | EE PLD |
| Number of Gates | 2500 |
| Number of Programmable I/O | 68 |
| Number of Logic Blocks (LABs) | 8 |
| Speed Grade | 10 |
| Output Function | MACROCELL |
| Number of Macro Cells | 128 |
| JTAG BST | YES |
| In-System Programmable | YES |
| Length | 29.3116mm |
| Width | 29.3116mm |
| REACH SVHC | Unknown |
| RoHS Status | RoHS Compliant |
| Lead Free | Lead Free |
EPM7128SLI84-10N Overview
There are 128 macro cells, which provide radio coverage via high-power cell towers, antennas or masts in a mobile phone network.A PLCC package contains the item.The device has 68inputs and outputs.The termination of a device is set to [0].QUADis the terminal position of this electrical part.The power source is powered by 5Vvolts.There is a part in the family [0].The chip is programmed with 84 pins.When using this device, CONFIGURABLE I/O OPERATION WITH 3.3V OR 5Vcan also be found.2500gates are devices that serve as building blocks for digital circuits.In general, it is recommended to store data in [0].Surface Mountis the mounting point of this electronic part.The device is designed with pins [0].A maximum voltage of 3.6Vis required for operation.The minimal supply voltage is 3V.There is 3.3/55V power supply available for it.A total of 68programmable I/Os are available.There is 147.1MHz frequency that can be achieved.In order to operate, the temperature should be higher than -40°C.Temperatures should be lower than 85°C when operating.The program consists of 8 logic blocks (LABs).The maximal frequency should be lower than 147.1MHz.There are several types of programmable logic that can be categorized as EE PLD.
EPM7128SLI84-10N Features
PLCC package
68 I/Os
84 pin count
84 pins
3.3/55V power supplies
8 logic blocks (LABs)
EPM7128SLI84-10N Applications
There are a lot of Altera EPM7128SLI84-10N CPLDs applications.
- ToR/Aggregation/Core Switch and Router
- State machine design
- Custom state machines
- Reset swapping
- I/O expansion
- Synchronous or asynchronous mode
- Network Interface Card (NIC) and Host Bus Adapter (HBA)
- Boolean function generators
- Battery operated portable devices
- STANDARD SERIAL INTERFACE UART
