EPM9560RC240-20
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Mount | Surface Mount |
| Package / Case | QFP |
| Number of Pins | 240 |
| Published | 1994 |
| JESD-609 Code | e0 |
| Pbfree Code | no |
| Moisture Sensitivity Level (MSL) | 3 |
| Number of Terminations | 240 |
| Terminal Finish | Tin/Lead (Sn/Pb) |
| Max Operating Temperature | 70°C |
| Min Operating Temperature | 0°C |
| Additional Feature | 772 FLIP FLOPS; CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V |
| HTS Code | 8542.39.00.01 |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | QUAD |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 220 |
| Supply Voltage | 5V |
| Terminal Pitch | 0.5mm |
| Frequency | 100MHz |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Pin Count | 240 |
| Operating Supply Voltage | 5V |
| Temperature Grade | COMMERCIAL |
| Max Supply Voltage | 5.25V |
| Min Supply Voltage | 4.75V |
| Operating Supply Current | 146mA |
| Number of I/O | 191 |
| Nominal Supply Current | 146mA |
| Memory Type | EEPROM |
| Propagation Delay | 20 ns |
| Frequency (Max) | 144MHz |
| Programmable Logic Type | EE PLD |
| Number of Gates | 12000 |
| Number of Programmable I/O | 191 |
| Number of Logic Blocks (LABs) | 35 |
| Output Function | MACROCELL |
| Number of Macro Cells | 560 |
| JTAG BST | YES |
| In-System Programmable | YES |
| Height Seated (Max) | 4.1mm |
| Length | 32mm |
| Width | 32mm |
| Radiation Hardening | No |
| RoHS Status | RoHS Compliant |
EPM9560RC240-20 Overview
There are 560 macro cells in the network, which are high-power cell sites that provide radio coverage (tower, antenna, or mast) for a mobile phone network.The product is contained in a QFP package.There are 191 I/Os programmed in it.Devices are programmed with terminations of [0].As the terminal position of this electrical part is [0], it serves as an important access point for passengers or freight.It is powered by a voltage of 5V volts.This part is part of the family [0].The chip is programmed with 240 pins.If you use this device, you will also find [0].A digital circuit can be constructed using 12000gates.If high efficiency is desired, the supply voltage should be kept at [0].Data storage is performed using [0].This device is mounted by Surface Mount.The pins are [0].With a maximum supply voltage of [0], it operates.A minimum supply voltage of 4.75V is required for this device to operate.There are 191 programmable I/Os in this system.This can be achieved at a frequency of 100MHz.Operating temperatures should be higher than 0°C.Ideally, the operating temperature should be below 70°C.In its simplest form, it consists of 35 logic blocks (LABs).It should be below 144MHzat the maximal frequency.Types of programmable logic are divided into EE PLD.
EPM9560RC240-20 Features
QFP package
191 I/Os
240 pin count
240 pins
35 logic blocks (LABs)
EPM9560RC240-20 Applications
There are a lot of Altera EPM9560RC240-20 CPLDs applications.
- SUPERVISORY FUNCTION (LVD AND WATCHDOG)
- State machine design
- Discrete logic functions
- Digital systems
- Power Meter SMPS
- Power up sequencing
- I2C BUS INTERFACE
- Wireless Infrastructure Base Band Unit and Remote Radio Unit
- POWER-SAVING MODES
- ON-CHIP OSCILLATOR CIRCUIT
