IDT74LVC273APGG
| Parameters | |
|---|---|
| Mounting Type | Surface Mount |
| Package / Case | 20-TSSOP (0.173, 4.40mm Width) |
| Supplier Device Package | 20-TSSOP |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tube |
| Series | 74LVC |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Type | D-Type |
| Voltage - Supply | 2.7V~3.6V |
| Base Part Number | 74LVC273 |
| Function | Reset |
| Output Type | Non-Inverted |
| Number of Elements | 1 |
| Current - Quiescent (Iq) | 10μA |
| Current - Output High, Low | 24mA 24mA |
| Number of Bits per Element | 8 |
| Max Propagation Delay @ V, Max CL | 8.5ns @ 3.3V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 4.5pF |
IDT74LVC273APGG Overview
In the form of 20-TSSOP (0.173, 4.40mm Width), it has been packaged. D flip flop is included in the Tubepackage. Non-Invertedis the output configured for it. This trigger is configured to use Positive Edge. It is mounted in the way of Surface Mount. The JK flip flop operates at a voltage of 2.7V~3.6V. In this case, the operating temperature is -40°C~85°C TA. There is D-Type type of electronic flip flop associated with this device. This type of FPGA is a part of the 74LVC series. In total, it contains 1 elements. It consumes 10μA of quiescent The 74LVC273family includes it. There is 4.5pF input capacitance for this T flip flop.
IDT74LVC273APGG Features
Tube package
74LVC series
IDT74LVC273APGG Applications
There are a lot of Renesas Electronics America Inc. IDT74LVC273APGG Flip Flops applications.
- Buffered Clock
- Power down protection
- Dynamic threshold performance
- Circuit Design
- ESD performance
- Divide a clock signal by 2 or 4
- QML qualified product
- Individual Asynchronous Resets
- Matched Rise and Fall
- Counters
