MC10EL35DTR2
| Parameters | |
|---|---|
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 8-TSSOP, 8-MSOP (0.118, 3.00mm Width) |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tape & Reel (TR) |
| Published | 2008 |
| Series | 10EL |
| JESD-609 Code | e0 |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 8 |
| Type | D-Type |
| Additional Feature | NECL MODE: VCC = 0V WITH VEE = -4.2V TO -5.7V |
| Subcategory | FF/Latches |
| Packing Method | TAPE AND REEL |
| Technology | ECL |
| Voltage - Supply | -4.2V~-5.7V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 240 |
| Supply Voltage | 5V |
| Terminal Pitch | 0.65mm |
| Reach Compliance Code | not_compliant |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | 10EL35 |
| JESD-30 Code | S-PDSO-G8 |
| Function | Reset |
| Qualification Status | Not Qualified |
| Output Type | Differential |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 5.7V |
| Power Supplies | -5.2V |
| Supply Voltage-Min (Vsup) | 4.2V |
| Number of Circuits | 1 |
| Number of Bits | 2 |
| Clock Frequency | 2.2GHz |
| Propagation Delay | 700 ps |
| Turn On Delay Time | 525 ps |
| Logic Function | Flip-Flop |
| Current - Quiescent (Iq) | 32mA |
| Prop. Delay@Nom-Sup | 0.745 ns |
| Trigger Type | Positive Edge |
| Power Supply Current-Max (ICC) | 32mA |
| Clock Edge Trigger Type | Positive Edge |
| Length | 3mm |
| Width | 3mm |
| RoHS Status | Non-RoHS Compliant |
| Lead Free | Contains Lead |
MC10EL35DTR2 Overview
The flip flop is packaged in 8-TSSOP, 8-MSOP (0.118, 3.00mm Width). It is included in the package Tape & Reel (TR). As configured, the output uses Differential. It is configured with a trigger that uses a value of Positive Edge. In this case, the electronic component is mounted in the way of Surface Mount. A voltage of -4.2V~-5.7Vis used as the supply voltage. A temperature of -40°C~85°C TAis used in the operation. A flip flop of this type is classified as a D-Type. In FPGA terms, D flip flop is a type of 10ELseries FPGA. It should not exceed 2.2GHzin terms of its output frequency. It consumes 32mA of quiescent Terminations are 8. D latch belongs to the 10EL35 family. A voltage of 5V provides power to the D latch. Surface Mount mounts this electronic component. This device has Positive Edgeas its clock edge trigger type. This device has the base part number FF/Latches. Flip flops designed with 2bits are used in this part. As soon as Vsup reaches 5.7V, the maximum supply voltage is reached. For normal operation, the supply voltage (Vsup) should be kept above 4.2V. The superior flexibility of this circuit is achieved by using 1 circuits. Considering its reliability, this T flip flop is well suited for TAPE AND REEL. An electrical current of -5.2V volts is applied to it. It is also characterized by NECL MODE: VCC = 0V WITH VEE = -4.2V TO -5.7V.
MC10EL35DTR2 Features
Tape & Reel (TR) package
10EL series
2 Bits
-5.2V power supplies
MC10EL35DTR2 Applications
There are a lot of ON Semiconductor MC10EL35DTR2 Flip Flops applications.
- Modulo – n – counter
- Balanced Propagation Delays
- ESD protection
- Latch
- Consumer
- Bus hold
- Clock pulse
- Functionally equivalent to the MC10/100EL29
- Buffer registers
- Guaranteed simultaneous switching noise level
