MC10EP29MNTXG
| Parameters | |
|---|---|
| Number of Circuits | 2 |
| Clock Frequency | 3GHz |
| Propagation Delay | 500 ps |
| Turn On Delay Time | 420 ps |
| Family | 10E |
| Logic Function | AND |
| Current - Quiescent (Iq) | 57mA |
| Halogen Free | Halogen Free |
| Number of Bits per Element | 1 |
| Trigger Type | Positive, Negative |
| High Level Output Current | -50mA |
| Low Level Output Current | 50mA |
| Power Supply Current-Max (ICC) | 60mA |
| Number of Output Lines | 1 |
| Clock Edge Trigger Type | Positive Edge |
| Length | 4mm |
| Width | 4mm |
| RoHS Status | RoHS Compliant |
| Lead Free | Lead Free |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 20-VFQFN Exposed Pad |
| Number of Pins | 20 |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tape & Reel (TR) |
| Published | 2009 |
| Series | 10EP |
| JESD-609 Code | e3 |
| Pbfree Code | yes |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 20 |
| Type | D-Type |
| Terminal Finish | Tin (Sn) |
| Additional Feature | NECL MODE: VCC = 0V WITH VEE = -3V TO -5.5V |
| Subcategory | FF/Latches |
| Technology | ECL |
| Voltage - Supply | -3V~-5.5V |
| Terminal Position | QUAD |
| Terminal Form | NO LEAD |
| Peak Reflow Temperature (Cel) | NOT SPECIFIED |
| Supply Voltage | 3.3V |
| Terminal Pitch | 0.5mm |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | 10EP29 |
| Function | Set(Preset) and Reset |
| Qualification Status | Not Qualified |
| Output Type | Differential |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 5.5V |
| Supply Voltage-Min (Vsup) | 3V |
MC10EP29MNTXG Overview
The flip flop is packaged in a case of 20-VFQFN Exposed Pad. It is included in the package Tape & Reel (TR). In the configuration, Differentialis used as the output. This trigger uses the value Positive, Negative. Surface Mountis occupied by this electronic component. With a supply voltage of -3V~-5.5V volts, it operates. In the operating environment, the temperature is -40°C~85°C TA. D-Typeis the type of this D latch. FPGAs belonging to the 10EPseries contain this type of chip. There should be no greater frequency than 3GHzon its output. T flip flop consumes 57mA quiescent energy. Currently, there are 20 terminations. JK flip flop belongs to 10EP29 family. A voltage of 3.3V provides power to the D latch. It belongs to the family of electronic devices known as 10E. It is mounted in the way of Surface Mount. Basically, it is designed with a set of 20 pins. It has a clock edge trigger type of Positive Edge. It is part of the FF/Latchesbase part number family. Vsup reaches 5.5V, the maximal supply voltage. Keeping the supply voltage (Vsup) above 3V is necessary for normal operation. The superior flexibility of this circuit is achieved by using 2 circuits. There are no output lines on the JK flip flop. Additionally, you may refer to the additional NECL MODE: VCC = 0V WITH VEE = -3V TO -5.5V of the electronic flip flop. -50mA is set as the high level output current. There is 50mA output current at the low level.
MC10EP29MNTXG Features
Tape & Reel (TR) package
10EP series
20 pins
MC10EP29MNTXG Applications
There are a lot of ON Semiconductor MC10EP29MNTXG Flip Flops applications.
- Buffer registers
- Communications
- Clock pulse
- Computing
- Bus hold
- Instrumentation
- Control circuits
- Modulo – n – counter
- Digital electronics systems
- Supports Live Insertion
