SN74HC112D
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 4 days ago) |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 16-SOIC (0.154, 3.90mm Width) |
| Number of Pins | 16 |
| Weight | 141.690917mg |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tube |
| Series | 74HC |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 16 |
| ECCN Code | EAR99 |
| Type | JK Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory | FF/Latches |
| Technology | CMOS |
| Voltage - Supply | 2V~6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 5V |
| Base Part Number | 74HC112 |
| Function | Set(Preset) and Reset |
| Output Type | Differential |
| Operating Supply Voltage | 5V |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 6V |
| Supply Voltage-Min (Vsup) | 2V |
| Number of Circuits | 2 |
| Load Capacitance | 50pF |
| Output Current | 5.2mA |
| Clock Frequency | 60MHz |
| Propagation Delay | 125 ns |
| Quiescent Current | 4μA |
| Turn On Delay Time | 13 ns |
| Family | HC/UH |
| Logic Function | AND, Flip-Flop, JK-Type |
| Current - Output High, Low | 5.2mA 5.2mA |
| Max I(ol) | 0.004 A |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 21ns @ 6V, 50pF |
| Trigger Type | Negative Edge |
| Input Capacitance | 3pF |
| Schmitt Trigger | No |
| Power Supply Current-Max (ICC) | 0.04mA |
| Number of Output Lines | 3 |
| Clock Edge Trigger Type | Negative Edge |
| Height | 1.75mm |
| Length | 9.9mm |
| Width | 3.91mm |
| Thickness | 1.58mm |
| Radiation Hardening | No |
| REACH SVHC | No SVHC |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
SN74HC112D Overview
The flip flop is packaged in a case of 16-SOIC (0.154, 3.90mm Width). D flip flop is embedded in the Tube package. This output is configured with Differential. It is configured with a trigger that uses a value of Negative Edge. There is an electric part mounted in the way of Surface Mount. With a supply voltage of 2V~6V volts, it operates. In the operating environment, the temperature is -40°C~85°C TA. It belongs to the type JK Typeof flip flops. The 74HCseries comprises this type of FPGA. You should not exceed 60MHzin its output frequency. Terminations are 16. The 74HC112 family contains it. A voltage of 5V is used as the power supply for this D latch. There is 3pF input capacitance for this T flip flop. An electronic device belonging to the family HC/UHcan be found here. There is an electronic component mounted in the way of Surface Mount. With its 16pins, it is designed to work with most electronic flip flops. Its clock edge trigger type is Negative Edge. There is a base part number FF/Latchesfor the RS flip flops. As soon as 6Vis reached, Vsup reaches its maximum value. For normal operation, the supply voltage (Vsup) should be kept above 2V. Due to its superior flexibility, it uses 2 circuits. In order to achieve high efficiency, the supply voltage should be maintained at 5V. It offers maximum design flexibility with its output current of 5.2mA. In order for the chip to function, it has 3output lines. Despite external influences, it consumes 4μAof quiescent current.
SN74HC112D Features
Tube package
74HC series
16 pins
SN74HC112D Applications
There are a lot of Texas Instruments SN74HC112D Flip Flops applications.
- ESD performance
- Shift Registers
- Automotive
- ATE
- Data Synchronizers
- Modulo – n – counter
- Digital electronics systems
- Reduced system switching noise
- Pattern generators
- Functionally equivalent to the MC10/100EL29
