SN74LS73ADR
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 3 days ago) |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 14-SOIC (0.154, 3.90mm Width) |
| Number of Pins | 14 |
| Weight | 129.387224mg |
| Operating Temperature | 0°C~70°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74LS |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 14 |
| ECCN Code | EAR99 |
| Type | JK Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory | FF/Latches |
| Packing Method | TR |
| Technology | TTL |
| Voltage - Supply | 4.75V~5.25V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 5V |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | 74LS73 |
| Function | Reset |
| Qualification Status | Not Qualified |
| Output Type | Differential |
| Operating Supply Voltage | 5V |
| Polarity | Non-Inverting |
| Power Supplies | 5V |
| Number of Circuits | 2 |
| Output Current | 8mA |
| Clock Frequency | 45MHz |
| Propagation Delay | 20 ns |
| Turn On Delay Time | 15 ns |
| Family | LS |
| Logic Function | Flip-Flop |
| Current - Quiescent (Iq) | 6mA |
| Output Characteristics | TOTEM POLE |
| Current - Output High, Low | 400μA 8mA |
| Max I(ol) | 0.008 A |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 20ns @ 5V, 15pF |
| Trigger Type | Negative Edge |
| Schmitt Trigger | No |
| Power Supply Current-Max (ICC) | 6mA |
| Number of Input Lines | 3 |
| Clock Edge Trigger Type | Negative Edge |
| Height | 1.75mm |
| Length | 8.65mm |
| Width | 3.91mm |
| Thickness | 1.58mm |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
SN74LS73ADR Overview
14-SOIC (0.154, 3.90mm Width)is the packaging method. Package Tape & Reel (TR)embeds it. The output it is configured with uses Differential. This trigger is configured to use Negative Edge. Surface Mountis positioned in the way of this electronic part. The JK flip flop operates at 4.75V~5.25Vvolts. In the operating environment, the temperature is 0°C~70°C TA. This logic flip flop is classified as type JK Type. This type of FPGA is a part of the 74LS series. It should not exceed 45MHzin terms of its output frequency. This process consumes 6mA quiescents. There have been 14 terminations. This D latch belongs to the family of 74LS73. The power supply voltage is 5V. Electronic devices of this type belong to the LSfamily. Surface Mount mounts this electronic component. 14pins are included in its design. This device's clock edge trigger type is Negative Edge. There is a FF/Latchesbase part number assigned to the RS flip flops. Due to its superior flexibility, it uses 2 circuits. Compared to other similar T flip flops, this device offers reliable performance and is well suited for TR. A power supply of 5Vis required to operate it. For high efficiency, the supply voltage should be set to 5V. Featuring the maximum design flexibility, it has an output current of 8mA . It has 3lines.
SN74LS73ADR Features
Tape & Reel (TR) package
74LS series
14 pins
5V power supplies
SN74LS73ADR Applications
There are a lot of Texas Instruments SN74LS73ADR Flip Flops applications.
- Asynchronous counter
- Registers
- High Performance Logic for test systems
- Communications
- Synchronous counter
- Storage Registers
- Storage registers
- Memory
- CMOS Process
- Consumer
